Ferroelectric capacitor stack etch cleaning methods

A method of etching and cleaning a ferroelectric capacitor structure in a semiconductor device, the method comprising:

• etching portions of an upper electrode, a ferroelectric material, and a lower electrode to define a patterned ferroelectric capacitor structure;
• etching a portion of a lower electrode diffusion barrier structure;
• ashing the patterned ferroelectric capacitor structure using a first ashing process;
• performing a wet clean process after the first ashing process;
• and
• ashing the patterned ferroelectric capacitor structure using a second ashing process after the wet clean process at a temperature of about 300 degrees C. or more in an oxidizing ambient, with no material formation processing between the wet clean process and the second ashing process.

A method of etching and cleaning a ferroelectric capacitor structure in a semiconductor device, the method comprising:

• etching portions of an upper electrode, a ferroelectric material, and a lower electrode to define a patterned ferroelectric capacitor structure;
• etching a portion of a lower electrode diffusion barrier structure;
• ashing the patterned ferroelectric capacitor structure using a first ashing process;
• performing a wet clean process after the first ashing process;
• and
• ashing the patterned ferroelectric capacitor structure using a second ashing process after the wet clean process, with no material formation processing between the wet clean process and the second ashing process.