Plasma damage protection circuit
AssigneeMacronix International Co., Ltd.
InventorsJen-Ren Huang, Min-Hung Chou, Yi-Chun Shih
Life of this patent
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Abstract
A plasma damage protection circuit includes a word line driver circuit with plasma damage protection features. If, during manufacture, plasma-based processes cause charge to build up on the word lines, the charge passes from the word lines through at least the word line drivers to the semiconductor substrate. Another plasma-based protection circuit includes a device coupled to multiple word line drivers. If, during manufacture, plasma-based processes cause charge to build up on the word lines, the charge passes from the word lines through at least the device to the semiconductor substrate. Thus, these plasma-based protection circuits save space while protecting the integrated circuit from plasma process-based damage.
Claims39
An integrated circuit comprising:
- a semiconductor substrate;
- a memory array coupled to the semiconductor substrate;
- a plurality of word lines coupled to the memory array;
- and
- a plurality of word line drivers, each word line driver of the plurality of word line drivers including a component, wherein during a memory operation the component couples a voltage to at least a word line of the plurality of word line drivers,
- wherein if during manufacture charge builds up on the word line, the component is coupled to the semiconductor substrate, and the charge passes from the word line through the component to the semiconductor substrate.
An integrated circuit comprising:
- a semiconductor substrate;
- a memory array coupled to the semiconductor substrate;
- a plurality of word lines coupled to the memory array;
- a plurality of word line drivers coupled to the plurality of word lines;
- and
- a component coupled to the plurality of word line drivers,
- wherein if during manufacture, charge builds up on word lines of the plurality of word lines, the charge passes from the word lines through at least the component to the semiconductor substrate.
An integrated circuit comprising:
- a semiconductor substrate;
- a memory array coupled to the semiconductor substrate;
- a plurality of word lines coupled to the memory array;
- a plurality of word line drivers, wherein each word line driver of the plurality of word line drivers including a word line driver component, wherein during a memory operation the word line driver component couples a voltage to at least a word line of the plurality of word line drivers is coupled to the semiconductor substrate and at least a word line of the plurality of word lines;
- and
- a component coupled to the plurality of word line drivers,
- wherein if during manufacture charge builds up on the word line, the charge passes from the word line to the semiconductor substrate through at least one of the component and the word line driver component.
A method for manufacturing an integrated circuit device, comprising:
- providing a semiconductor substrate;
- forming a memory array coupled to the semiconductor substrate;
- forming a plurality of word lines coupled to the memory array;
- forming a plurality of word line drivers coupled to the plurality of word lines, each word line driver of the plurality of word line drivers including a component, wherein during a memory operation the component couples a voltage to at least a word line of the plurality of word line drivers;
- and
- passing charge from the plurality of word lines through the component to the semiconductor substrate if during manufacture the charge builds up on the word line.
A method for manufacturing an integrated circuit device, comprising:
- providing a semiconductor substrate;
- forming a memory array coupled to the semiconductor substrate;
- forming a plurality of word lines coupled to the memory array;
- forming a plurality of word line drivers coupled to the plurality of word lines;
- forming a component coupled to the plurality of word line drivers;
- and
- passing charge from word lines of the plurality of word lines through at least the component to the semiconductor substrate during manufacture, if during manufacture the charge builds up on the word lines.
A method for manufacturing an integrated circuit device, comprising:
- providing a semiconductor substrate;
- forming a memory array coupled to the semiconductor substrate;
- forming a plurality of word lines coupled to the memory array;
- forming a plurality of word line drivers coupled to the plurality of word lines, each word line driver of the plurality of word line drivers including a word line driver component, wherein during a memory operation the word line driver component couples a voltage to at least a word line of the plurality of word line drivers;
- forming a component coupled to the plurality of word line drivers;
- if during manufacture the charge builds up on the plurality of word lines, then
- passing charge from the plurality of word lines through at least the word line driver component to the semiconductor substrate;
- and
- passing charge from each word line of the plurality of word lines through at least the component to the semiconductor substrate during manufacture if during manufacture the charge builds up on the plurality of word lines.
Dependencies are inferred from the claim text.