Address comparator of semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorSeok Lee
Life of this patent
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Abstract
Disclosed is an address comparator configured to flow a current only for an initial short time, but not at other times, such as when an address is input thereto for a repair operation. The address comparator includes a plurality of unit address comparators comparing addresses received for the repair operation, a PMOS transistor turned on for a short time, an NMOS transistor controlling a current flow through the plurality of unit address comparators , and a PMOS transistor turned off when the plurality of unit comparators allows the current flow, and turned on when the plurality of unit comparators does not allow the current flow.
Claims7
An address comparator of a semiconductor memory device, comprising:
- a plurality of unit address comparators connected between first and second nodes to compare addresses input for a repairing operation;
- a first precharging circuit to precharge the first node for a time to take the first node to a high level;
- a first discharging circuit to control a current flow through the plurality of unit address comparators connected between the first and second nodes;
- and
- a second precharging circuit inactivated when the current flow is allowed and to precharge the first node when the current flow is not allowed.
Dependencies are inferred from the claim text.