Semiconductor device and a method of manufacturing the same

A semiconductor device comprising a well region of a first conduction type formed in a main surface of a semiconductor substrate and a nonvolatile memory element formed in the well region of the first conduction type,

• wherein the nonvolatile memory element includes:
• a gate electrode formed over the well region of the first conduction type through an insulating film for charge storage;
• and
• a source region and a drain region, both being of a second conduction type, which are positioned in the well region of the first conduction type as being kept apart from each other along a gate length of the gate electrode, and
• wherein the well region of the first conduction type has first and second impurity concentration peaks in an impurity concentration distribution as viewed from the main surface of the semiconductor substrate toward a direction of depth,
• the first impurity concentration peak being located at a region shallower than the source region and the drain region, and the second impurity concentration peak being located at a region deeper than the source region and the drain region.

A semiconductor device comprising a well region of a first conduction type formed in a main surface of a semiconductor substrate, and a nonvolatile memory element formed in the well region of the first conduction type,

• wherein the nonvolatile element includes:
• a gate electrode formed over the well region of the first conduction type through an insulating film for charge storage;
• and
• a source region and a drain region of a second conduction type arranged in the well region of the first conduction type as being kept apart from each other along a gate length of the gate electrode,
• wherein the well region of the first conduction type comprises:
• a third semiconductor region arranged between the source region and the drain region and in contact with the source region, the drain region and the insulating film for charge storage;
• a second semiconductor region which is disposed between the source region and the drain region, which is arranged at a position deeper than the third semiconductor region toward a direction of depth from the main surface of the semiconductor substrate and is in contact with the source region, the drain region and the third semiconductor region, and which has an impurity concentration lower than the third semiconductor region;
• and
• a first semiconductor region that is arranged at a position deeper than the second semiconductor region toward a direction of depth from the main surface of the semiconductor substrate and in contact with the source region, the drain region and the second semiconductor region, and which has an impurity concentration lower than the second semiconductor region,
• wherein a pair of fourth semiconductor regions of a first conduction type is arranged between the source and drain regions and the first semiconductor region in the direction of depth of the semiconductor substrate as being kept apart from each other along a gate length of the gate electrode, and
• wherein the fourth semiconductor regions has an impurity concentration higher than the first and second semiconductor regions.