Nonvolatile semiconductor memory device and a method of word lines thereof
AssigneeKabushiki Kaisha Toshiba
InventorKoji Hosono
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AssigneeKabushiki Kaisha Toshiba
InventorKoji Hosono
Estimating the term…
A nonvolatile semiconductor memory device comprising a memory cell array having a plurality of blocks each including a plurality of electrically reprogrammable nonvolatile memory cells arranged in matrix, a first circuit for selecting one from the plurality of blocks, the first circuit having a plurality of transistors connected to word lines connected to some of the nonvolatile memory cells and a second circuit for generating a first voltage V1, a second voltage V2 and a third voltage V3 (V3<V2<V1), the first voltage V1, the second voltage V2 and the third voltage V3 being applied to sources or drains corresponding the plurality of transistors, the first voltage V1 being applied to a source or drain of one of the transistors connected to a selected word line at a timing of programming data, the second voltage V2 being applied to sources or drains of some of the transistors connected to non-selected word lines at the timing of programming data, and the third voltage V3 being applied to a source or a drain of one of the transistors connected to at least one of the non-selected word lines at the timing of programming data, the third voltage V3 being higher than a well or substrate voltage of the plurality of transistors, and the third voltage being the lowest among voltages applied to the sources or drains of the plurality of transistors applied in a period of the first voltage V1 and the second voltage V2 being applied to corresponding the word lines.
A nonvolatile semiconductor memory device comprising:
A method for driving word lines of a nonvolatile semiconductor memory device, said nonvolatile semiconductor memory device comprising:
Dependencies are inferred from the claim text.