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US 2006/0133135 A1Published application
Reducing power in SRAMs while maintaining cell stability
OwnerJonathan Lachman, Donald Weiss +2inventors
InventorsJonathan Lachman, Donald Weiss, John Wuu, Charles Morganti
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Abstract
An SRAM with reduced power consumption comprising N SRAM cells and peripheral circuitry that enables writing and reading any of the N SRAM cells. The number of cells, N, is a whole number. The voltage applied to the N SRAM cells is higher than the voltage applied to the peripheral circuitry.
Claims20
1) An SRAM with reduced power consumption comprising:
- a) N SRAM cells;
- b) peripheral circuitry that enables writing and reading any of the N SRAM cells;
- c) wherein N is a whole number;
- d) wherein a voltage applied to the N SRAM cells is higher than a voltage applied to the peripheral circuitry.
1 more element
11) A method of manufacturing an SRAM with reduced power consumption comprising:
- a) fabricating N SRAM cells;
- b) fabricating peripheral circuitry that enables writing and reading any of the N SRAM cells;
- c) wherein N is a whole number;
- d) wherein a voltage applied to the N SRAM cells is higher than a voltage applied to the peripheral circuitry.
1 more element
Dependencies are inferred from the claim text.