Module
AssigneeElpida Memory, Inc.
InventorsYutaka Uematsu, Hideki Osaka, Yoji Nishio, Seiji Funaba
Life of this patent
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Abstract
In a memory module, a plurality of memories are mounted on a module base plate, impedance between Vref and Vss near each memory is coupled to Vss by a decoupling capacitor and a Vref plane to achieve low impedance configuration in a wide frequency range, Vref planes are individually provided for the respective memories, and the Vref planes are connected to each other by using a high impedance wire, or a high impedance chip part. Accordingly, a wiring technique for a module which allows effective reduction of self noise and propagation noise can be provided.
Claims25
A module comprising a semiconductor device using a reference voltage and a module base plate mounted with a plurality of the semiconductor devices, wherein
- the module base plate is mounted on a system base plate;
- reference voltage input portions of the plurality of the semiconductor devices mounted on the module base plate are connected with decoupling capacitors and reference voltage power source planes constituting a parallel plate with a Vss layer;
- and
- the decoupling capacitors and the reference voltage power source planes are provided near the semiconductor devices such that one of the decoupling capacitors and one of the reference voltage power source planes are assigned for each of semiconductor devices individually.
Dependencies are inferred from the claim text.