Thin-film transistor array substrate and liquid crystal display device

A thin-film transistor array substrate, comprising:

• an optically transparent substrate;
• an auxiliary capacitance formed for each pixel on said optically transparent substrate;
• and
• a thin-film transistor formed for each pixel above said auxiliary capacitance;
• wherein the auxiliary capacitance comprises a lower electrode, a dielectric film formed so as to cover said lower electrode, and a plurality of upper electrodes disposed for each pixel in the row and column directions and formed in the area above said lower electrode on the dielectric film;
• said upper electrodes are connected to said thin-film transistor;
• and
• a separation area between said upper electrodes that are adjacent in at least one direction selected from the row direction and the column direction is equidistant from two thin-film transistors that correspond to the upper electrodes thereof.

A thin-film transistor array substrate, comprising:

• an optically transparent substrate;
• an auxiliary capacitance formed for each pixel on said optically transparent substrate;
• and
• a thin-film transistor formed for each pixel above said auxiliary capacitance;
• wherein said auxiliary capacitance comprises a plurality of lower electrodes disposed for each pixel in the row and column directions, a dielectric film formed so as to cover said lower electrodes, and an upper electrode formed on said dielectric film with at least a portion thereof disposed in the area above said lower electrodes;
• said lower electrodes are connected to said thin-film transistor;
• and
• said upper electrode is disposed above said separation area.

A thin-film transistor array substrate, comprising:

• an optically transparent substrate;
• an auxiliary capacitance formed for each pixel on said optically transparent substrate;
• and
• a thin-film transistor formed for each pixel above said auxiliary capacitance;
• wherein the auxiliary capacitance comprises a lower electrode, a dielectric film formed so as to cover said lower electrode, and a plurality of upper electrodes disposed for each pixel in the row and column directions and formed in the area above said lower electrodes on said dielectric film;
• said upper electrodes are connected to said thin-film transistor;
• and
• said lower electrode is disposed below said separation area.