Output circuit, digital/analog circuit and display apparatus

A digital/analog conversion circuit comprising:

• a circuit for generating (m×S) reference voltages (where m and S being respectively predetermined positive integers) having mutually different voltage values,
• an output terminal,
• at least a decoder block for receiving as input the (m×S) reference voltages and outputting the voltage selected from the (m×S) reference voltages according to the values of the first, second and third bit groups of a digital data signal having a plurality of bits, the bit groups forming respective predetermined bit fields, to the first and second terminals and
• an amplifier circuit for receiving the voltage supplied to the first and second terminals from the decoder block and outputting the voltage obtained by internally dividing the voltage of the first and second terminals to a predetermined internal ratio from the output terminal,
• the decoder block having circuit blocks arranged at three stages;
• the first stage circuit blocks including S circuit blocks, each being adapted to receive as input m reference voltages out of the (m×S) input reference voltages and select and output two voltages from the m reference voltages according to the value of the first bit, allowing duplication,
• the second stage circuit blocks including a circuit block adapted to receive as input either of the two voltages selected by each of the S first stage circuit blocks and select and output one of the S input voltages according to the value of the second bit group and a circuit block adapted to receive as input the other of the two voltages selected by each of the S first stage circuit blocks and select and output one of the S input voltages according to the value of the second bit group and
• the third stage circuit blocks including a circuit block adapted to receive as input the voltages selected and output by the two second stage circuit blocks and control the input two voltages so as to supply them to the first and second terminals or block the supply thereof,
• a voltage of any of the (m2×S) mutually different voltage levels being output from the output terminal according to the signal values of the first through third bit groups.

A digital/analog conversion circuit comprising:

• a circuit for generating (m×S) reference voltages (where m and S being respectively predetermined positive integers) having mutually different voltage values,
• an output terminal,
• at least a decoder block for receiving as input the (m×S) reference voltages and outputting the voltage selected from the (m×S) reference voltages according to the values of the first, second and third bit groups of a digital data signal having a plurality of bits, the bit groups forming respective predetermined bit fields, to the first and second terminals and
• an amplifier circuit for receiving the voltage supplied to the first and second terminals from the decoder block and outputting the voltage obtained by internally dividing the voltage of the first and second terminals to a predetermined internal ratio from the output terminal,
• the decoder block having circuit blocks arranged at three stages;
• the first stage circuit blocks including m circuit blocks, each being adapted to receive as input S reference voltages out of the (m×S) input reference voltages and select and output a voltage from the S reference voltages,
• the second stage circuit blocks including a circuit block adapted to receive as input the m voltages selected by the m first stage circuit blocks and select and output two of the m input voltages according to the value of the second bit group and circuit blocks and
• the third stage circuit blocks including a circuit block adapted to receive as input the two voltages selected and output by the two second stage circuit blocks and control the input two voltages so as to supply them to the first and second terminals or block the supply thereof,
• a voltage of any of the (m2×S) mutually different voltage levels being output from the output terminal according to the signal values of the first through third bit groups.

An output circuit comprising:

• a plurality of terminals for receiving as input (m×S) reference voltages (where m and S being respectively predetermined positive integers) having mutually different voltage values,
• an output terminal,
• a selection circuit for receiving as input the (m×S) reference voltages and a digital data signal of a plurality of bits and outputting the voltages selected from the (m×S) reference voltages according to the values of the first, second and third bit groups of the digital data signal, each forming a predetermined bit field,
• n amplifier circuit for receiving as input the voltages supplied to the first and second terminals from the selection circuit and outputting the voltage obtained by internally dividing the difference of the voltages of the first and second terminals to a predetermined internal ratio from the output terminal,
• the selection circuit having circuit blocks arranged at three stages;
• the first stage circuit blocks including S circuit blocks, each being adapted to receive as input m reference voltages out of the (m×S) input reference voltages and select and output two voltages from the m reference voltages, allowing duplication,
• the second stage circuit blocks including a circuit block and select and output one of the S input voltages according to the value of the second bit group and a circuit block adapted to receive as input the other of the two voltages selected by each of the S first stage circuit blocks and select and output one of the S input voltages according to the value of the second bit group and
• the third stage circuit blocks including a circuit block adapted to receive as input the voltages selected and output by the two second stage circuit blocks and control the input two voltages so as to supply them to the first and second terminals or block the supply thereof,
• a voltage of any of the (m2×S) mutually different voltage levels being output from the output terminal according to the signal values of the first through third bit groups.

An output circuit comprising:

• a plurality of terminals for receiving as input (m×S) reference voltages (where m and S being respectively predetermined positive integers) having mutually different voltage values,
• an output terminal,
• a selection circuit for receiving as input the (m×S) reference voltages and a digital data signal of a plurality of bits and outputting the voltages selected from the (m×S) reference voltages according to the values of the first, second and third bit groups of the digital data signal, each forming a predetermined bit field,
• an amplifier circuit for receiving as input the voltages supplies to the first and second terminals from the selection circuit and outputting the voltage obtained by internally dividing the difference of the voltages of the first and second terminals to a predetermined internal ratio from the output terminal,
• the selection circuit having circuit blocks arranged at three stages;
• the first stage circuit blocks including m circuit blocks, each being adapted to receive as input S reference voltages out of the (m×S) input reference voltages and select and output a voltage from the S reference voltages,
• the second stage circuit blocks including a circuit block adapted to receive as input the m voltages selected by the m first stage circuit blocks and select and output two of the m input voltages according to the value of the second bit group and circuit blocks and
• the third stage circuit blocks including a circuit block adapted to receive as input the two voltages selected and output by the two second stage circuit blocks and controls the input two voltages so as to supply them to the first and second terminals or block the supply thereof,
• a voltage of any of the (m2×S) mutually different voltage levels being output from the output terminal according to the signal values of the first through third bit groups.