MOS type semiconductor integrated circuit device
AssigneeKabushiki Kaisha Toshiba
InventorsKeiichi Kushida, Osamu Hirabayashi
Life of this patent
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Abstract
A plurality of MOS type circuits is provided, and are connected in a multistage manner. A first transistor is inserted between a power source voltage VDD and a power supply node of each of MOS type circuits at an odd numbered stage. A second transistor is inserted between the power source voltage VDD and a power supply node of each of MOS type circuits at an even numbered stage. When the plurality of MOS type circuits are established in a standby state, a control circuit first controls to make a second transistor conductive, and then make a first transistor conductive when the plurality of MOS type circuits, each of which is established in a standby state, are recovered from the standby state to an active state.
Claims19
A MOS type semiconductor integrated circuit device, comprising:
- a plurality of MOS type circuits, each of which has at least one P-channel MOS transistor and one N-channel MOS transistor and has a power supply node, the MOS type circuits being connected in a multistage manner that an output signal at a front stage is supplied as an input signal at a rear stage;
- a first switch element inserted between a first power voltage node and a power supply node of each of MOS type circuits at an odd numbered stage viewed from a final stage from among said plurality of MOS type circuits;
- a second switch element inserted between the first power voltage node and a power supply node of each of MOS type circuits at an even numbered stage viewed from the final stage from among said plurality of MOS type circuits;
- and
- a control circuit connected to the first and second switch elements to control the first and second switch elements, the control circuit first making the second switch element conductive, and then, making the first switch element conductive when said plurality of MOS type circuits, each of which is established in a standby state, are recovered from the standby state to an active state.
A MOS type semiconductor integrated circuit device, comprising:
- a word line to which a plurality of memory cells are connected;
- a drive circuit connected to the word line to drive the word line;
- and
- a first control circuit connected to the drive circuit to control an operation of the drive circuit,
- wherein the drive circuit has:
- a plurality of MOS type circuits, each of which has at least one P-channel MOS transistor and one N-channel MOS transistor and has a power supply node, the MOS type circuits being connected in a multistage manner that an output signal at a front stage is supplied as an input signal to a rear stage;
- a first switch element inserted between a first power source voltage node and a power supply node of each of MOS type circuits at an odd numbered stage viewed from a final stage from among said plurality of MOS type circuits;
- and
- a second switch element inserted between the first power source voltage node and a power supply node of each of MOS type circuits at an even numbered stage viewed from the final stage from among said plurality of MOS type circuits, and
- the first control circuit first makes the second switch element conductive, and then, makes the first switch element conductive when said plurality of MOS type circuits, each of which is established in a standby state, are recovered from the standby state to an active state.
A MOS type semiconductor integrated circuit device, comprising:
- an interface circuit which outputs a signal from an output terminal;
- and
- a control circuit connected to the interface circuit to control an operation of the interface circuit,
- wherein the interface circuit has:
- a first MOS type circuit having P-channel and N-channel MOS transistors and having a power supply node, an output node of the first MOS type circuit being connected to an output terminal of the interface circuit;
- a second MOS type circuit having P-channel and N-channel MOS transistors and having a power supply node, the second MOS type circuit inputting an output signal to the first MOS type circuit;
- a first switch element inserted between the power supply node of the first MOS type circuit and a first power source voltage node;
- and
- a second switch element inserted between the power supply node of the second MOS type circuit and the first power source voltage node, and
- the control circuit first makes the second switch element conductive, and then makes the first switch element conductive when the first and second MOS type circuits, each of which is established in a standby state, are recovered from the standby state to an active state.
Dependencies are inferred from the claim text.