Clock generator circuit, signal multiplexing circuit, optical transmitter, and clock generation method

A clock generator circuit comprising:

• a first clock signal generator circuit including a first toggle flip-flop circuit which generates a pair of frequency-divided clock signals with different phases;
• and
• a second clock signal generator circuit including a second toggle flip-flop circuit which generates a pair of frequency-divided clock signals with different phases by frequency dividing either one of the pair of frequency-divided clock signals generated by said first toggle flip-flop circuit,
• wherein said second clock signal generator circuit includes a delay flip-flop circuit connected in parallel to the second toggle flip-flop circuit, and the delay flip-flop circuit generates another pair of frequency-divided clock signals with different phases by delaying either one of the pair of frequency-divided clock signals generated by the second toggle flip-flop circuit based on the other frequency-divided clock signal generated by the first toggle flip-flop circuit.

A clock generation method comprising the steps of:

• generating, as a first clock signal, a pair of frequency-divided clock signals with different phases by means of a first toggle flip-flop circuit;
• and
• generating, as a second clock signal, a pair of frequency-divided clock signals with different phases by frequency dividing either one of the pair of frequency-divided clock signals generated by the first toggle flip-flop circuit by means of a second toggle flip-flop circuit, and
• generating, as the second clock signal, another pair of frequency-divided clock signals with different phases by delaying either one of the pair of frequency-divided clock signals generated by the second toggle flip-flop circuit based on the other frequency-divided clock signal generated by the first toggle flip-flop circuit, by means of a delay flip-flop circuit connected in parallel to the second toggle flip-flop circuit.