# US 2006/0132105 A1 · Controlling inrush current > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2006/0132105 A1 - Document ID: US20060132105A1 - Status: Published application - Kind: A1 - Application number: 11/012,242 - Filed: 2004-12-16 - Published: 2006-06-22 - Earliest claimed: 2004-12-16 - Inventors: Atluri Prasad; Hai Nguyen - Web page: https://patentgrep.com/patent/US20060132105A1 ## CPC - H02M 1/4225: {using a non-isolated boost converter} - H02H 9/001: {limiting speed of change of electric quantities, e.g. soft switching on or off (progressive control of electronic switches for eliminating interferences H03K17/16)} - Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H) - Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS ## Abstract A control circuit and method for controlling a power factor correction circuit comprising: an inductor having an input terminal to receive an input voltage and an output terminal series connected to an anode of a diode; a first capacitor connected between a cathode of said diode and ground; a first switch connected between an anode of said diode and ground; a series arrangement of a second capacitor and a parallel arrangement of a resistor and a second switch series connected with said second capacitor. The control circuit is operable to generate synchronous first and second switch control signals to respectively control said first and second switches, wherein during inrush current conditions when said input voltage drops-in after an interruption, said control circuit is operable to cause said first and second switches to be synchronously switched at increasing duty cycles. The method comprises charging a first capacitor from an input voltage source; isolating the first capacitor from the input voltage source; transferring a portion of charge stored in said first capacitor to a second capacitor while said input voltage source is isolated from said first capacitor and from said second capacitor; and repeatedly said charging, isolating, and transferring until a voltage is formed on said second capacitor that is approximately equal to said input voltage source. ## Claims ### Claim 1 A power factor correction circuit comprising: an inductor having an input terminal to receive an input voltage and an output terminal series connected to an anode of a diode; a first capacitor connected between a cathode of said diode and ground; a first switch connected between an anode of said diode and ground; a series arrangement of a second capacitor and a resistor coupled between said diode cathode and ground; and a second switch connected in parallel with said resistor. ### Claim 2 (depends on 1) The circuit of claim 1, further comprising: a control circuit operable to generate synchronous first and second switch control signals to respectively control said first and second switches, wherein during inrush current conditions when said input voltage drops-in after an interruption, said control circuit is operable to cause said first and second switches to be synchronously switched at increasing duty cycles. ### Claim 3 (depends on 2) The circuit of claim 2, wherein said control circuit comprises: a first control circuit operable to generate a first switch control signal having a duty cycle based on a soft-start capacitor voltage; a second control circuit operable to generate a second switch control signal having a same instantaneous value as said first switch control signal when said output voltage is below a steady state value, and having a first logic value when said output voltage is approximately at said steady state value; and a third control circuit operable to discharge said soft-start capacitor when said input voltage to the power factor correction circuit is interrupted. ### Claim 4 (depends on 1) The circuit of claim 1, wherein said input voltage is a rectified voltage signal derived from an AC source voltage. ### Claim 5 (depends on 2) The circuit of claim 2, wherein, during inrush current conditions caused by initial receipt of said input voltage, said control circuit maintains said resistor in series with said second capacitor, and maintains said first capacitor in parallel with said second capacitor. ### Claim 6 (depends on 2) The circuit of claim 2, wherein synchronously switching said first and second switches at gradually increasing duty cycles causes energy to be initially stored in said first capacitor and incrementally transferred to and stored in said second capacitor, wherein during such transfer, said inrush current is limited by said resistor. ### Claim 7 (depends on 1) The circuit of claim 1, wherein said first and second capacitors have a relative capacitance that cause said first capacitor to charge more quickly than said second capacitor. ### Claim 8 A power supply circuit for receiving an AC input voltage and for generating a DC output voltage, comprising: an inductor having an input terminal to receive an input voltage and an output terminal series connected to an anode of a diode; a first capacitor connected between a cathode of said diode and ground; a first switch connected between an anode of said diode and ground; a second capacitor connected between said diode cathode and ground to provide an output voltage; and a parallel arrangement of a resistor and a second switch series connected with said second capacitor. ### Claim 9 (depends on 8) The power supply circuit of claim 8, further comprising: a phase control rectifying circuit operable to receive said AC input voltage and to generate a rectified input voltage signal. ### Claim 10 (depends on 8) The power supply circuit of claim 8, further comprising: a regulator circuit coupled to said inductor to receive said rectified input voltage signal and to generate a DC voltage signal. ### Claim 11 (depends on 9) The power supply circuit of claim 9, wherein said input voltage is generated by a phase control rectifying circuit comprising: an electromagnetic interference (EMI) filter that filters an AC source voltage; and a full-wave rectifier that rectifies said AC source voltage to provide said input voltage. ### Claim 12 (depends on 8) The power supply circuit of claim 8, further comprising: a control circuit operable to generate synchronous first and second switch control signals to respectively control said first and second switches, wherein during inrush current conditions when said input voltage drops-in after an interruption, said control circuit is operable to cause said first and second switches to be synchronously switched at increasing duty cycles. ### Claim 13 (depends on 12) The power supply circuit of claim 12, wherein said control circuit comprises: a first control circuit operable to generate a first switch control signal having a duty cycle based on a soft-start capacitor voltage; and a second control circuit operable to generate a second switch control signal having a same instantaneous value as said first switch control signal when said output voltage is below a steady state value, and having a first logic value when said output voltage is approximately at said steady state value. ### Claim 14 (depends on 13) The power supply circuit of claim 13, wherein said control circuit further comprises: a third control circuit operable to discharge said soft-start capacitor when said input voltage to the power factor correction circuit is interrupted. ### Claim 15 (depends on 12) The power supply circuit of claim 12, wherein, during inrush current conditions caused by initial receipt of said input voltage, said control circuit maintains said resistor in series with said second capacitor, and maintains said first capacitor in parallel with said second capacitor. ### Claim 16 (depends on 12) The power supply circuit of claim 12, wherein synchronously switching said first and second switches at gradually increasing duty cycles causes energy to be initially stored in said first capacitor and incrementally transferred to and stored in said second capacitor, wherein during such transfer, said inrush current is limited by said resistor. ### Claim 17 (depends on 8) The power supply circuit of claim 8, wherein said first and second capacitors have a relative capacitance that cause said first capacitor to charge more quickly than said second capacitor. ### Claim 18 A system comprising: a power supply circuit for receiving an AC input voltage and for generating a DC output voltage, comprising: an inductor having an input terminal to receive an input voltage and an output terminal series connected to an anode of a diode; a first capacitor connected between a cathode of said diode and ground; a first switch connected between an anode of said diode and ground; a second capacitor connected between said diode cathode and ground to provide an output voltage; and a parallel arrangement of a resistor and a second switch series connected with said second capacitor. ### Claim 19 (depends on 18) The system of claim 18, wherein the system is a computer system. ### Claim 20 (depends on 18) The system of claim 18, further comprising: a phase control rectifying circuit operable to receive said AC input voltage and to generate a rectified input voltage signal. ### Claim 21 (depends on 18) The system of claim 18, further comprising: a regulator circuit coupled to said inductor to receive said rectified input voltage signal and to generate a DC voltage signal. ### Claim 22 (depends on 18) The power supply circuit of claim 18, wherein said input voltage is generated by a phase control rectifying circuit comprising: an electromagnetic interference (EMI) filter that filters an AC input voltage; and a full-wave rectifier that rectifies said AC source voltage to provide said input voltage. ### Claim 23 (depends on 18) The power supply circuit of claim 18, further comprising: a control circuit operable to generate synchronous first and second switch control signals to respectively control said first and second switches, wherein during inrush current conditions when said input voltage drops-in after an interruption, said control circuit is operable to cause said first and second switches to be synchronously switched at increasing duty cycles. ### Claim 24 (depends on 23) The power supply circuit of claim 23, wherein said control circuit comprises: a first control circuit operable to generate a first switch control signal having a duty cycle based on a soft-start capacitor voltage; a second control circuit operable to generate a second switch control signal having a same instantaneous value as said first switch control signal when said output voltage is below a steady state value, and having a first logic value when said output voltage is approximately at said steady state value; and a third control circuit operable to discharge said soft-start capacitor when said input voltage to the power factor correction circuit is interrupted. ### Claim 25 A method for controlling inrush current in a power supply, comprising: charging a first capacitor from an input voltage source; isolating the first capacitor from the input voltage source; transferring a portion of charge stored in said first capacitor to a second capacitor while said input voltage source is isolated from said first capacitor and from said second capacitor; and repeatedly said charging, isolating, and transferring until a voltage is formed on said second capacitor that is approximately equal to said input voltage source.