Repairable three-dimensional semiconductor subsystem

A connector for making a flip chip connection between an input/output pad of an integrated circuit and a trace of an interconnection circuit comprising:

• a metallic spring element formed on said input/output pad;
• a well having conductive walls connected to said trace of said interconnection circuit;
• a conductive material filling said well;
• and,
• wherein said metallic spring element is inserted into said conductive material in said well to make said flip chip connection.

A repairable electronic subsystem comprising:

• a semiconductor integration platform having terminals comprising wells filled with conductive material;
• one or more semiconductor elements that attach to said integration platform, said semiconductor elements having a conductive spring element formed at each input/output pad;
• and,
• wherein said attachment of said semiconductor elements to said integration platform is accomplished by inserting said conductive spring elements into said wells filled with said conductive material.

A method for building a repairable electronic subsystem comprising the steps of:

• a) providing a semiconductor integration platform having embedded circuits fabricated therein;
• b) fabricating input/output terminals in an assembly layer on said integration platform, said terminals comprising wells filled with conductive material;
• and,
• c) attaching semiconductor elements to said integration platform using flip chip terminals comprising conductive spring elements, wherein said attachment is achieved by inserting said spring elements into said wells filled with conductive material.

A method for fabricating conductive spring elements at input/output pads of a semiconductor wafer comprising the steps of:

• a) providing an under bump metallization on said input/output pads if required;
• b) providing a cathode for an electroforming process, said cathode connecting with each of said input/output pads;
• c) building up layers of negative resist on said under bump metallization and patterning said resist by exposing with ultra-violet radiation projected through a mask, said patterning producing un-cross-linked regions of resist separated by cross-linked regions of resist;
• d) developing said un-cross-linked regions of resist to form corresponding cavities;
• e) filling said cavities with metal using an electroforming process that plates up from said cathode layer, or from plated sections connected with said cathode layer;
• f) planarizing the top surface of said filled cavities and removing excess copper as required using chemical mechanical polishing;
• g) providing offsets between said un-cross-linked regions as required to create stair-cased slanting sections of said spring elements;
• and,
• h) stripping said cross-linked regions of resist to reveal stand-alone copies of said spring elements, each of said stand alone copies attaching to one of said input/output pads.

An integrated circuit comprising:

• a semiconductor substrate in which circuits are fabricated;
• bump or wire-like terminals formed at input/output pads of said semiconductor substrate;
• and,
• an interface adaptor including flexible fingers and a base layer supporting said fingers, wherein an end of each of said fingers attaches to the back side of said semiconductor substrate.

A semiconductor integration platform comprising:

• a semiconductor substrate having conductive traces;
• an assembly layer on one or both sides of said substrate;
• wells having conductive walls formed in said assembly layer;
• electrical connection between said conductive walls and selected ones of said traces;
• and,
• conductive material filling said wells.