Semiconductor device and method of fabricating the same
AssigneeKabushiki Kaisha Toshiba
InventorsMitsuru Watanabe, Tetsuya Fukui
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Abstract
A semiconductor device has a semiconductor device chip with upper and lower terminal electrodes, and upper and lower frames bonded to the upper and lower terminal electrodes, respectively, with solder material, wherein the semiconductor device chip includes: a semiconductor layer of a first conductivity type; a diffusion layer of a second conductivity type, which is selectively formed in the semiconductor layer; a plurality of guard-ring layers of the second conductivity type, which are formed outside of the diffusion layer in the semiconductor layer; an insulating film formed on the semiconductor layer; and a field plate formed of a poly-crystalline silicon film embedded in the insulating film.
Claims17
A semiconductor device having a semiconductor device chip with upper and lower terminal electrodes, and upper and lower frames bonded to the upper and lower terminal electrodes, respectively, with solder material, wherein said semiconductor device chip comprises:
- a semiconductor layer of a first conductivity type;
- a diffusion layer of a second conductivity type, which is selectively formed in said semiconductor layer;
- a plurality of guard-ring layers of the second conductivity type, which are formed outside of said diffusion layer in said semiconductor layer;
- an insulating film formed on said semiconductor layer;
- and
- a field plate formed of a poly-crystalline silicon film embedded in said insulating film.
A semiconductor device comprising a planar-type diode with upper and lower terminal electrodes, upper and lower frames bonded to the upper and lower terminal electrodes, respectively, with solder material, and a resin mold sealing said diode and said upper and lower frames therein, wherein
- said diode comprises:
- a base semiconductor layer of a first conductivity type;
- a first terminal diffusion layer of a second conductivity type, which is selectively formed in the top surface of said base semiconductor layer;
- a second terminal diffusion layer formed in the bottom surface of said base semiconductor layer;
- a plurality of guard-ring layers of the second conductivity type, which are formed outside of said first terminal diffusion layer in said base semiconductor layer;
- an insulating film formed on the top surface of said base semiconductor layer to cover said guard-ring layers;
- and
- a field plate formed of an impurity-doped polycrystalline silicon film embedded in said insulating film.
A method of fabricating a planer-type semiconductor device comprising:
- selectively forming a terminal diffusion layer and a plurality of guard-ring layers surrounding the terminal diffusion layer, both being of a second conductivity type, in a top surface of a base semiconductor layer of a first conductivity type;
- forming a first silicon dioxide film on the base semiconductor layer;
- depositing and then patterning an impurity-doped polycrystalline silicon film to form a field plate on the first silicon dioxide film;
- forming a second silicon dioxide film to cover the field plate;
- forming a contact hole in the first and second silicon dioxide films;
- and
- forming an upper terminal electrode on the second silicon dioxide film to be contacted with the terminal diffusion layer through the contact hole, the upper terminal electrode being formed of a laminated metal film which mainly contains one selected in Ni, Fe and Co.
Dependencies are inferred from the claim text.