Structures and methods for enhancing capacitors in integrated circuits
AssigneeMicron Technology, Inc.
InventorsCem Basceri, Vishnu Agarwal, Dan Gealy
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Abstract
Systems, devices, structures, and methods are described that inhibit dielectric degradation at high temperatures. An enhanced capacitor is discussed. The enhanced capacitor includes a first electrode, a dielectric that includes ditantalum pentaoxide, and a second electrode having a compound. The compound includes a first substance and a second substance. The second electrode includes a trace amount of the first substance. The morphology of the semiconductor structure remains stable when the trace amount of the first substance is oxidized during crystallization of the dielectric. In one embodiment, the crystalline structure of the dielectric describes substantially a (001) lattice plane.
Claims32
A semiconductor structure comprising:
- a metallization layer;
- a first conductive layer directly contacting the metallization layer, the conductive layer including a first compound, the first compound including a first substance and a second substance;
- an insulator layer formed directly on the first conductive layer, the insulator layer including a second compound;
- and
- a second conductive layer formed directly on the insulator layer.
A semiconductor structure comprising:
- a metallization layer directly contacting a substrate;
- a first conductive layer directly contacting the metallization layer, the conductive layer including a first compound, the first compound including a metal substance and a nonmetal substance;
- an insulator layer formed directly on the first conductive layer, the insulator layer including a second compound, the second compound including a metal substance and a nonmetal substance;
- and
- a second conductive layer formed directly on the insulator layer.
A semiconductor structure comprising:
- a transistor;
- and
- a capacitor coupled to the transistor via a region of a substrate, the capacitor including:
- a capacitor plug coupled to the region of the substrate;
- a first capacitor electrode directly contacting the capacitor plug, the first capacitor electrode including a first compound, the first compound including a first substance and a second substance;
- a capacitor dielectric layer formed directly on the first capacitor electrode, the capacitor dielectric including a second compound;
- and
- a second capacitor electrode formed directly on the capacitor dielectric.
A system comprising:
- a processor;
- and
- a dynamic random access memory device coupled to the processor, the dynamic random access memory device including a plurality of memory cells, at least one of the memory cells including:
- a transistor;
- and
- a capacitor coupled to the transistor via a region of a substrate, the capacitor including:
- a capacitor plug coupled to the region of the substrate;
- a first capacitor electrode directly contacting the capacitor plug, the first capacitor electrode including a first compound, the first compound including a first substance and a second substance;
- a capacitor dielectric layer formed directly on the first capacitor electrode, the capacitor dielectric including a second compound;
- and
- a second capacitor electrode formed directly on the capacitor dielectric.
A method comprising:
- transferring a charge in a semiconductor structure, the semiconductor structure including a metallization layer, a first conductive layer directly contacting the metallization layer, the conductive layer including a first compound, the first compound including a first substance and a second substance, an insulator layer formed directly on the first conductive layer, the insulator layer including a second compound, and a second conductive layer formed directly on the insulator layer.
Dependencies are inferred from the claim text.