Semiconductor device and manufacturing method thereof

A manufacturing method for a semiconductor device, comprising the steps of:

• providing a lead frame having a chip mounting section and a plurality of leads, the chip mounting section having a base section, an insulation film, a plurality of inter-connect sections and a chip mounting area, the insulation film covering a surface of said base section, the plurality of inter-connect sections being arrayed on said insulation film along edges of said base section, the chip mounting area being disposed inside the array of said plurality of inter-connect sections, and the plurality of leads being spaced away from said chip mounting section to surround said chip mounting section;
• mounting a first semiconductor chip having a plurality of first electrode pads on said chip mounting area;
• electrically connecting said first electrode pads to said inter-connect sections by first bonding wires;
• providing a second semiconductor chip having a cavity, a plurality of second electrode pads, a first main surface and a second main surface opposite said first main surface, the cavity being formed from said second main surface, and the plurality of second electrode pads being exposed from said first main surface and being formed along edges of said first main surface;
• mounting said second semiconductor chip on said chip mounting section, such that said first semiconductor chip and said first bonding wires are received in said cavity and a part of said plurality of inter-connect sections is exposed;
• electrically connecting said exposed part of the inter-connect sections to said leads by second bonding wires;
• electrically connecting said second electrode pads to said leads by third bonding wires;
• forming a sealing section to seal said second and third bonding wires, said second semiconductor chip and said leads, with a part of said leads left as an exposed section;
• and
• cutting said exposed section of the leads to obtain an independent semiconductor device.

A semiconductor device comprising:

• lead frame means including chip mounting means and lead means, the chip mounting means having a base, insulation means, inter-connect means, and a chip mounting area, the base having a surface and a plurality of edges, the insulation means covering the surface of said base, the inter-connect means being arrayed on said insulation means along the plurality of edges of said base, the chip mounting area being disposed inside the array of said inter-connect means, and the lead means being spaced from said chip mounting means to surround said chip mounting means;
• first semiconductor chip means having a plurality of first electrode pad means mounted on said chip mounting area of said lead frame means;
• first bonding wire means for electrically connecting said first electrode pad means to said inter-connect means;
• second semiconductor chip means having a cavity and a plurality of second electrode pad means, the second semiconductor chip means being mounted on said chip mounting means with a part of said inter-connect means exposed, the cavity being formed from a lower surface of the second semiconductor chip means, the plurality of second electrode pad means being exposed from an upper surface of the second semiconductor chip means and being formed along edges of said upper surface of the second semiconductor chip means, and said first semiconductor chip means and said first bonding wire means being received in said cavity;
• second bonding wire means for electrically connecting said exposed part of said inter-connect means to said lead means;
• third bonding wire means for electrically connecting said second electrode pad means to said lead means;
• and
• sealing means for sealing said second and third bonding wire means, said second semiconductor chip mean, and said lead means, with a part of said lead means left as an exposed section, and using the exposed section of said lead means as external terminals.