Apparatus and method for driving liquid crystal display device

An apparatus for driving a liquid crystal display device comprising:

• a timing controller;
• a data buffer having a first buffer for storing first data control signals from the timing controller and a second data buffer for storing second data control signals from the timing controller, the first and second buffers each capable of storing an equal number of data control signals;
• a liquid crystal display panel having a first display area and a second display area, each display area having data lines;
• and
• a data driver having a first data driver portion for generating first data signals based on the first data control signals and supplying the first data signals to the data lines in the first display area and a second data driver portion for generating second data signals based on the second data control signals and supplying the second data signals to the data lines in the second display area in parallel with the first data driver portion supplying the first data signals to the data lines in the first display area.

A method for driving a liquid crystal display device comprising a timing controller, a data buffer having at least first and second buffers for temporarily storing data control signals from the timing controller, a liquid crystal display panel having at least first and second display areas, and a data driver, the method comprising steps of:

• dividing the data control signals into first data control signals and second data control signals;
• storing the first data control signals in the first buffer and the second data control signals in the second buffer;
• generating first data signals based on the first data control signals and supplying the first data signals to data lines in the first display area;
• and
• generating second data signals based on the second data control signals and supplying the second data signals to data lines in the second display area, wherein
• the generating and supplying of the first data signals is performed in parallel with the generating and supplying of the second data signals.