Display device

A display device comprising:

• a pixel element electrode;
• a plurality of drain signal lines supplying a digital image signal comprising a plurality of bit signals;
• a plurality of capacitance elements, each of the capacitance elements being weighted according to a corresponding bit level, receiving through a corresponding drain signal line a corresponding bit signal and storing the corresponding bit signal as a charge therein;
• a refresh transistor initializing a voltage of the pixel element electrode to a predetermined voltage based on a first timing signal;
• and
• a plurality of charge transfer transistors, each of the charge transfer transistors supplying a corresponding charge stored in a corresponding capacitance element to the pixel element electrode based on a second timing signal so that an analog image signal corresponding to the digital image signal is supplied to the pixel element electrode.

A display device including a plurality of pixel elements, each of the pixel elements comprising:

• an EL element;
• an EL drive transistor controlling an electric current going through the EL element;
• a plurality of capacitance elements, each of the capacitance elements receiving through a corresponding drain line a corresponding bit signal of a digital image signal and storing the corresponding bit signal as a charge therein;
• and
• a plurality of charge transfer transistors, each of the charge transfer transistors supplying a corresponding charge stored in a corresponding capacitance element to a gate of the EL drive transistor based on a timing signal.

A display device including a plurality of pixel elements disposed in a matrix and a plurality of drain signal lines for supplying a digital image signal comprising a plurality of bit signals, each of the pixel elements comprising:

• a pixel element electrode;
• a plurality of pixel element selection transistors, each of the pixel element selection transistors selecting a corresponding pixel element in response to a gate scan signal fed from a corresponding gate signal line;
• a plurality of capacitance elements, each of the capacitance elements being weighted according to a corresponding bit level, receiving through a corresponding drain signal line a corresponding bit signal and storing the corresponding bit signal as a charge therein, the bit signal being fed from the corresponding drain signal line through a corresponding pixel element selection transistor;
• a plurality of charge transfer transistors, each of the charge transfer transistors supplying a corresponding charge stored in a corresponding capacitance element to the pixel element electrode so that an analog image signal corresponding to the digital image signal is supplied to the pixel element electrode,
• wherein gates of the charge transfer transistors of one of the pixel elements are connected to the gate signal line of the pixel element disposed in a row next to the row of said one of the pixel elements in a vertical scanning sequence.

A display device including a plurality of pixel elements disposed in a matrix and a plurality of drain signal lines for supplying a digital image signal comprising a plurality of bit signals, each of the pixel elements comprising:

• an EL element;
• an EL drive transistor controlling an electric current going through the EL element;
• a plurality of pixel element selection transistors, each of the pixel element selection transistors selecting a corresponding pixel element in response to a gate scan signal fed from a corresponding gate signal line;
• a plurality of capacitance elements, each of the capacitance elements being weighted according to a corresponding bit level, receiving through a corresponding drain signal line a corresponding bit signal and storing the corresponding bit signal as a charge therein, the bit signal being fed from the corresponding drain signal line through a corresponding pixel element selection transistor;
• and
• a plurality of charge transfer transistors, each of the charge transfer transistors supplying a corresponding charge stored in a corresponding capacitance element to a gate of the EL drive transistors,
• wherein the gates of the charge transfer transistors of one of the pixel elements are connected to the gate signal line of the pixel element disposed in a row next to the row of said one of the pixel elements in a vertical scanning sequence.

A display device including a plurality of pixel elements disposed in a matrix and a plurality of drain signal lines for supplying a digital image signal comprising a plurality of bit signals, each of the pixel elements comprising:

• a pixel element electrode;
• a plurality of pixel element selection transistors, each of the pixel element selection transistors selecting a corresponding pixel element in response to a gate scan signal fed from a corresponding gate signal line;
• a plurality of capacitance elements, each of the capacitance elements being weighted according to a corresponding bit level, receiving through a corresponding drain signal line a corresponding bit signal and storing the corresponding bit signal as a charge therein, the bit signal being fed from the corresponding drain signal line through a corresponding pixel element selection transistor;
• a plurality of charge transfer transistors, each of the charge transfer transistors supplying a corresponding charge stored in a corresponding capacitance element to the pixel element electrode;
• and
• a refresh transistor for initializing a voltage of the pixel element electrode before the charge transfer transistors supply corresponding charges to the pixel element electrode, a gate of the refresh transistor being connected to the gate signal line of said each of the pixel elements.

A display device including a plurality of pixel elements disposed in a matrix and a plurality of drain signal lines for supplying a digital image signal comprising a plurality of bit signals, each of the pixel elements comprising:

• an EL element;
• an EL drive transistor controlling an electric current going through the EL element;
• a plurality of pixel element selection transistors, each of the pixel element selection transistors selecting a corresponding pixel element in response to a gate scan signal fed from a corresponding gate signal line;
• a plurality of capacitance elements, each of the capacitance elements being weighted according to a corresponding bit level, receiving through a corresponding drain signal line a corresponding bit signal and storing the corresponding bit signal as a charge therein, the bit signal being fed from the corresponding drain signal line through a corresponding pixel element selection transistor;
• a plurality of charge transfer transistors, each of the charge transfer transistors supplying a corresponding charge stored in a corresponding capacitance element to a gate of the EL drive transistors,
• a refresh transistor for initializing a voltage of the gate of the EL drive transistor before the charge transfer transistors supply corresponding charges to the gate of the EL drive transistor, a gate of the refresh transistor being connected to the gate signal line of said each of the pixel elements.