Bit depth reduction for analog to digital conversion in global positioning system
AssigneeThe Johns Hopkins University
InventorsRobert Henderson, Mark Asher
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AssigneeThe Johns Hopkins University
InventorsRobert Henderson, Mark Asher
Estimating the term…
Disclosed is a system and method for reducing a bit-depth requirement for an A/D converter in a GPS receiver having an antenna for receiving an analog input signal and a low noise amplifier for amplifying the input signal, comprising a filter for filtering about a bandwidth B the amplified signal; a down-conversion module centering the frequency of the filtered signal about a center frequency f0; an automatic gain controller (AGC) for setting a set point of the input signal; an adder for adding noise to the gain controlled signal, said noise based upon the bandwidth B and center frequency f0; and an analog to digital (A/D) converter for converting the added noise signal to a digital signal, wherein the noise added to the gain controlled signal reduces the bit depth requirement of the A/D converter.
A system for reducing a bit depth requirement for an A/D converter in a GPS (Global Positioning System) receiver having an antenna for receiving an analog input signal, said input signal having a GPS signal component and a jamming signal component, and a jam suppression processor for suppressing the jamming signal component, comprising:
A method for reducing a bit-depth requirement for an A/D converter in a GPS (Global Positioning System) receiver having an antenna for receiving an analog input signal, said input signal having a GPS signal component and a jamming signal component, and a jam suppression processor for suppressing the jamming signal component, comprising the steps of:
Dependencies are inferred from the claim text.