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US 2006/0125677 A1Published application
Charge-domain A/D converter employing multiple pipelines for improved precision
AssigneeMassachusetts Intitute of Technology
InventorMichael Anthony
Life of this patent
Estimating the term…
Abstract
A new architecture is provided in which a master A/D converter of limited precision controls the adjustment-charge steering of a set of similar slave A/D converter pipelines. This architecture relieves the layout constraints imposed by prior architectures and also reduces power consumption of the device. By spatially interleaving the slave pipelines in an array, the new architecture also improves accuracy.
Claims16
An apparatus comprising:
- a master analog-to-digital converter (ADC) having an input adapted to receive an analog signal to be converted, the master ADC further having a digital output of at least one bit;
- and
- a plurality of analog-to-digital converter pipelines (ADCPs) each of said ADCPs having an analog input adapted to receive said analog signal to be converted, an analog output and each of said ADCPs further having a digital input coupled to the digital output of said master ADC such that digital output bits from said master ADC are sequentially applied to said ADCPs.
An apparatus comprising:
- a master analog-to-digital converter (ADC) having an input adapted to receive an analog signal to be converted, the master ADC further having a digital output of at least one bit;
- and
- at least three analog-to-digital converter pipelines (ADCP) each having an analog input adapted to receive said analog signal to be converted, an analog output and each of said ADCPs further having a digital input coupled to the digital output of said master ADC such that said master ADC drives each of said at least three ADCPs.
A charge domain apparatus comprising:
- a master analog-to-digital converter (ADC) having an input adapted to receive an analog signal to be converted, the master ADC further having a digital output of at least one bit;
- and
- a plurality of analog-to-digital converter pipelines (ADCPs), each of said ADCPs having an input adapted to receive said analog signal to be converted, each of said ADCPs further having a digital input coupled to the digital output of said master ADC, and each of said ADCPs further having an analog output wherein said master ADC feeds each of said plurality of ADCPs;
- and
- means for adding charge at each stage of each ADCP based upon the at least one output bit from said master ADC such that said ADCP outputs are provided having a reduced charge difference as compared to a sampling result.
2 more elements
A method of converting an analog signal into digital form, the method comprising:
- sampling the analog signal in a master (analog-to-digital converter) ADC;
- sampling the analog signal in a plurality of analog-to-digital converter pipelines (ADCPs), resulting in an output comprising a charge pair having a difference proportional to a characteristic of the signal;
- performing an analog-to-digital conversion in the master ADC, resulting in at least one output bit;
- and
- selectively adding charge at each stage of each ADCP based upon the at least one output bit from the master ADC, resulting in ADCP outputs having a reduced charge difference as compared to a sampling result.
2 more elements
An apparatus comprising:
- a master analog-to-digital converter (ADC) having an input adapted to receive an analog signal to be converted, the master ADC further having a digital output of at least one bit;
- a first analog-to-digital converter (ADCP) having an input adapted to receive said analog signal to be converted, and ADCP further having a digital input coupled to the digital output of said master ADC, said first ADCP further having an analog output;
- and
- wherein the apparatus is constructed and arranged to enable said analog signal to be converted to be received simultaneously at the master ADC and first ADCP.
1 more element
Dependencies are inferred from the claim text.