Method and apparatus for calibrating analog circuits using statistical techniques

A method for reducing a first threshold voltage mismatch between a first and a second MOSFET connected to form a first differential pair disposed on an integrated circuit, the method comprising

• fabricating a plurality of MOSFETS on the integrated circuit;
• selecting MOSFETS from the plurality of MOSFETS according to a statistical analysis;
• connecting MOSFETS from among the selected MOSFETS to form a plurality of second differential pairs;
• and
• connecting the plurality of second differential pairs to form a composite differential pair for replacing the first differential pair, wherein a second threshold voltage mismatch of the composite differential pair is less than the first threshold voltage mismatch.

A method for forming a first differential amplifier on an integrated circuit, the method comprising:

• determining a desired operating parameter mismatch for the first differential amplifier;
• fabricating a plurality of transistors on the integrated circuit;
• selecting transistors from the plurality of transistors according to a statistical analysis;
• connecting transistors from among the selected transistors to form a plurality of second differential amplifiers;
• and
• connecting the plurality of second differential amplifiers to form a composite differential amplifier having an operating parameter mismatch less than the desired operating parameter mismatch.