# US 2006/0125398 A1 · Plasma display panel > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2006/0125398 A1 - Document ID: US20060125398A1 - Status: Published application - Kind: A1 - Application number: 11/284,003 - Filed: 2005-11-22 - Published: 2006-06-15 - Earliest claimed: 2004-11-23 - Assignees: LG Electronics Inc. - Inventors: Sung Ahn - Web page: https://patentgrep.com/patent/US20060125398A1 ## CPC - H01J 11/36: Spacers, barriers, ribs, partitions or the like - H01J 11/12: with main electrodes provided on both sides of the discharge space - H01J 11/38: Dielectric or insulating layers - H01J 2211/363: Cross section of the spacers - H01J 2211/42: Fluorescent layers - H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H) ## Abstract A plasma display panel includes an upper plate and a lower plate with a low dielectric constant. By adjusting factors such as the widths of an electrode and a barrier rib within an optimum range, panel capacitance can be reduced and the efficiency of a sustain discharge or an address discharge can be improved. ## Claims ### Claim 1 A plasma display panel comprising: an upper plate comprised of a scan electrode and a sustain electrode; a lower plate comprised of an address electrode, wherein the upper or lower plate has a dielectric constant of 10 or lower. ### Claim 2 (depends on 1) The panel of claim 1, wherein scan and sustain electrodes of one discharge cell are arranged to be symmetrical with scan and sustain electrodes of an adjacent discharge cell. ### Claim 3 (depends on 1) The panel of claim 1, wherein the upper plate comprises an upper dielectric layer stacked on the scan electrode and the sustain electrode, and the upper dielectric layer has a dielectric constant of 10 or lower. ### Claim 4 (depends on 3) The panel of claim 3, wherein the upper dielectric layer has a thickness of 35 μm or smaller. ### Claim 5 (depends on 1) The panel of claim 1, wherein the scan electrode and the sustain electrode are formed of a transparent electrode and a metal bus electrode, respectively, and the transparent electrodes are separated with a distance of 90 μm therebetween. ### Claim 6 (depends on 5) The panel of claim 5, wherein the width of the transparent electrodes is 200 μm or smaller. ### Claim 7 A plasma display panel comprising: an upper plate; and a lower plate facing the upper plate, the upper plate and the lower plate being coupled, wherein at least one or more electrodes are formed on the upper and lower plates, and an upper dielectric layer is stacked on the electrode of the upper plate such that a thickness of a portion of the upper dielectric layer overlapping with the electrode is larger than that of a portion thereof which does not overlap with the electrode. ### Claim 8 (depends on 7) The panel of claim 7, wherein the upper dielectric layer has a dielectric constant of 10 or lower. ### Claim 9 (depends on 7) The panel of claim 7, wherein the thickness of the upper dielectric layer is 35 μm or smaller. ### Claim 10 (depends on 7) The panel of claim 7, wherein the portion of the upper dielectric layer overlapping with the electrode has the thickness of 35 μm or smaller, and the portion thereof which does not overlap with the electrode has the thickness of 10 μm or smaller. ### Claim 11 A plasma display panel comprising: an upper plate comprised of a scan electrode and a sustain electrode formed in a first direction; and a lower plate comprised of an address electrode formed in a second direction crossing the first direction, and a vertical barrier rib formed in the second direction to separate R, G and B pixel discharge cells and a horizontal barrier rib separating a panel line in the first direction, wherein the horizontal and vertical barrier ribs have a lower width larger than the upper width thereof. ### Claim 12 (depends on 11) The panel of claim 11, wherein the lower width of the horizontal barrier rib is larger by 1.6 times to 2 times than the upper width thereof. ### Claim 13 (depends on 11) The panel of claim 11, wherein the lower width of the vertical barrier rib is larger by 1.4 times to 1.9 times than the upper width thereof. ### Claim 14 (depends on 11) The panel of claim 11, wherein the horizontal or vertical barrier rib has a height of 120 μm or larger. ### Claim 15 (depends on 11) The panel of claim 11, wherein the horizontal or vertical barrier rib has a dielectric constant of 10 or lower. ### Claim 16 (depends on 11) The panel of claim 11, wherein the horizontal or vertical barrier rib is a Pb-free barrier rib. ### Claim 17 (depends on 11) The panel of claim 11, wherein a phosphor layer with a thickness of 10 μm or smaller is formed on the lower dielectric layer stacked on the address electrode and on the barrier rib formed at the lower plate. ### Claim 18 (depends on 11) The panel of claim 11, wherein an upper and lower plate electrode overlap portion where the scan electrode and the sustain electrode of the upper plate and the address electrode of the lower plate overlap has an area of 14,000 μm2. ### Claim 19 (depends on 18) The panel of claim 18, wherein the upper and lower plate electrode overlap portion does not overlap with a portion of the barrier rib. ### Claim 20 (depends on 18) The panel of claim 18, wherein when the scan electrode and the sustain electrode of the upper plate are formed with a width of 200 μm or smaller, the address electrode of the lower plate is formed with a width of 80 μm or smaller. ### Claim 21 A plasma display panel comprising: an upper plate comprised of a scan electrode and a sustain electrode; and a lower plate comprised of an address electrode, wherein the address electrode comprises a protruding portion with a first width overlapping with the scan electrode, other portion, than the protruding portion, of the address electrode having a second width smaller than the first width. ### Claim 22 (depends on 21) The panel of claim 21, wherein the protruding portion of the address electrode has the area of 14,000 μm2 or smaller. ### Claim 23 (depends on 21) The panel of claim 21, wherein the protruding portion of the address electrode does not overlap with a barrier rib formed at the lower plate. ### Claim 24 (depends on 21) The panel of claim 21, wherein the first width of the address electrode is 100 μm˜120 μm and the second width thereof is 20 μm˜80 μm. ### Claim 25 (depends on 21) The panel of claim 21, wherein a phosphor layer with the thickness of 10 μm or smaller is formed on the lower dielectric layer stacked on the address electrode and on the barrier rib of the lower plate.