Method for metal gate structure for MOS devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJhon-Jhy Liaw
Life of this patent
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Abstract
A method for forming a gate structure includes forming a gate dielectric layer on a semiconductor substrate and a metal gate conductor on the gate dielectric layer. A cap layer is formed on the metal gate conductor. The method provides for patterning the cap layer, the gate metal layer and the gate dielectric layer to form a capped gate conductor. At least one spacer is formed to cover sidewalls of the metal gate conductor and the cap layer, such that the cap layer and the spacer encloses the metal gate conductor layer therein. At least one self-aligned contact structure formed next to the metal gate conductor on the semiconductor substrate. As such, the cap layer and the spacer separate the self-aligned contact structure from directly contacting the metal gate conductor.
Claims10
A method for forming a gate structure for MOS devices, comprising:
- depositing a gate dielectric layer on a substrate;
- depositing a gate metal layer atop the gate dielectric layer;
- depositing a cap layer atop the gate metal layer;
- patterning the cap layer, the gate metal layer and the gate dielectric layer to form a capped gate conductor;
- forming one or more spacers covering sidewalls of the capped gate conductor, including a stack of the patterned cap layer and gate metal layer;
- forming an inter-level dielectric layer over the capped gate conductor, the spacers and the substrate;
- forming a contact opening in the inter-level dielectric layer, exposing a portion of a top surface of the substrate adjacent to the spacers;
- and
- forming a contact structure within the contact opening, wherein the spacers and the cap layer separate the contact structure from the patterned gate metal layer enclosed therein.
Dependencies are inferred from the claim text.