Transistor using impact ionization and method of manufacturing the same
AssigneeElectronics and Telecommunications Research Institute
InventorsJong Yang, In Baek, Ki Im, Chang Ahn, Won Cho, Seong Lee
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AssigneeElectronics and Telecommunications Research Institute
InventorsJong Yang, In Baek, Ki Im, Chang Ahn, Won Cho, Seong Lee
Estimating the term…
A transistor using impact ionization and a method of manufacturing the same are provided. A gate dielectric layer, a gate, and first and second spacers are formed on a semiconductor substrate. A first impurity layer is formed spaced from the first spacer and a second impurity layer is formed expanding and overlapping with the second spacer therebelow, by performing slant ion-implantation on the semiconductor substrate using the gate and the first and second spacers as a mask. A source and a drain are formed on the semiconductor substrate to be self-aligned with the first and second spacers, respectively, thereby defining an ionization region between the source and the drain in the semiconductor substrate. The source includes a first silicide layer to form a schottky junction with the ionization region. The drain includes a portion of the second impurity layer overlapping with the second spacer and a second silicide layer which is aligned with the second spacer to form an ohmic contact with the second impurity layer.
A method of manufacturing a transistor using impact ionization, the method comprising:
A transistor using impact ionization, comprising:
Dependencies are inferred from the claim text.