Memory device with reduced cell area
AssigneeTexas Instruments Incorporated
InventorsJozef Mitros, Victor Ivanov
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Abstract
The present invention provides for a memory device comprising a bulk substrate. A first lightly doped region (220) is formed in the bulk substrate (210). A first active region (220) is formed in the first lightly doped region (220). A second lightly doped region (320) is formed in the bulk substrate (310). A second active region (340) is formed in the second lightly doped region (320). A third active region (340) is formed in the bulk substrate (310). An oxide layer (230, 330) is disposed outwardly from the bulk substrate (210, 310) and a floating gate layer (250, 350) is disposed outwardly from the oxide layer (230, 330).
Claims16
1-13. (canceled)
A method for manufacturing a memory device, comprising:
- forming a bulk substrate;
- forming an oxide layer disposed outwardly from the bulk substrate;
- forming at least one field oxide region in the oxide layer;
- forming a first lightly doped region in the bulk substrate;
- forming a second lightly doped region in the bulk substrate;
- forming a gate oxide region in the oxide layer;
- forming a polysilicon layer disposed outwardly from the oxide layer;
- forming a first active region in the first lightly doped region;
- forming a second active region in the second lightly doped region;
- and
- forming a third active region in the bulk substrate.
28-30. (canceled)
Dependencies are inferred from the claim text.