Method and apparatus for evaluating and debugging assertions

A system for evaluating an assertion expression about a circuit design, the assertion expression having a hierarchy of subexpressions, the hierarchy having a plurality of leaf subexpressions, at least one intermediate subexpression each expressing a portion of the assertion expression in terms of at least one member of the group consisting of the leaf subexpressions and other intermediate subexpressions, and a root expression representing the entire assertion expression in terms of at least one member of the group consisting of the leaf subexpressions and the intermediate subexpressions, for use with a source indicating the status of each binary signal affecting the assertion expression on each of a plurality of clock ticks in an evaluation period, the system comprising:

• a memory;
• a data processor coupled to the memory, the data processor configured to:
• evaluate the assertion expression against the binary signals from the source, for a subject assertion attempt beginning within the evaluation period;
• and
• report status information of at least one of the intermediate subexpressions.

Apparatus for evaluating an assertion expression about a circuit design, the assertion expression having a hierarchy of subexpressions, the hierarchy having a plurality of leaf subexpressions, at least one intermediate subexpression each expressing a portion of the assertion expression in terms of at least one member of the group consisting of the leaf subexpressions and other intermediate subexpressions, and a root expression representing the entire assertion expression in terms of at least one member of the group consisting of the leaf subexpressions and the intermediate subexpressions,

• for use with a source indicating the status of each binary signal affecting the assertion expression on each of a plurality of clock ticks in an evaluation period,
• comprising a data structure organizing the hierarchy of subexpressions as a tree having a plurality of node objects, each child node object in the plurality of node objects representing a subexpression operand of the expression of its parent node object, the plurality of node objects including a root node object representing the entire assertion expression,
• each of the node objects having a set evaluation method and a tick evaluation method,
• the set evaluation method of each given one of the node objects, for each individual element in an input set of alive ticks, operable to call the tick evaluation method of the given node object with the individual element as an input tick,
• the tick evaluation method of the given node object operable to return a set of zero or more alive ticks in response to each call made to the tick evaluation method,
• the set evaluation method of the given node object operable to combine the sets of alive ticks returned from all of the calls made by the set evaluation method of the given node object to the tick evaluation method of the given node object, and returning the combined set of alive ticks to a caller of the set evaluation method of the given node object.