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US 2006/0085705 A1Published application
Memory circuit comprising an initialization unit, and method for optimizing data reception parameters in a memory controller
OwnerAndre Schaeferinventor
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Abstract
The invention relates to a memory circuit comprising a read only memory unit for providing a number of fixed programmed test data; comprising an initialization unit in order, in an initialization mode, to output the fixed programmed test data in a specific sequence to an output terminal.
Claims20
A memory circuit, comprising:
- a read only memory unit for providing a number of fixed programmed test data;
- and
- an initialization unit configured to, in an initialization mode, output the fixed programmed test data in a specific sequence to an output terminal.
A method for optimizing data reception parameters in a memory controller, comprising:
- providing a number of fixed programmed test data in a memory circuit;
- and
- in an initialization mode, outputting the fixed programmed test data from the memory circuit in a specific sequence to an output terminal.
A memory system, comprising:
- a memory controller;
- and
- a memory circuit comprising a read only memory unit for providing a number of fixed programmed test data and an initialization unit configured to, in an initialization mode, output the fixed programmed test data to the memory controller in a specific sequence to an output terminal.
Dependencies are inferred from the claim text.