Trace controller, microprocessor, and trace control method
AssigneeNEC Electronics Corporation
InventorShuji Satoh
Life of this patent
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Abstract
A trace controller receives data access information during load instruction execution and ID (AID) of a load/store buffer to store the data access information during load instruction execution. Then, it generates trace control information TC based on the received data access information and selects a buffer to store the generated trace control information from a plurality of trace control buffers according to the received AID. After that, it receives read data information after load instruction execution and ID (RID) of a load/store buffer used for load instruction execution. Finally, it selects a buffer storing the trace control information TC from the plurality of trace control buffers according to the RID.
Claims10
A trace controller for tracing on a microprocessor,
- wherein the trace controller associates trace information during instruction execution with trace information after instruction execution according to identification information identifying one of a plurality of load buffers used for execution of a load instruction in the microprocessor.
A microprocessor comprising:
- a plurality of load buffers storing data access information necessary for executing a load instruction,
- wherein first identification information identifying one of the plurality of load buffers storing the data access information is output during load instruction execution, and second identification information identifying one of the plurality of load buffers used for data access is output after load instruction execution.
A trace control method to collect data output from a microprocessor, comprising:
- receiving data access information during load instruction execution in the microprocessor and first identification information identifying one of a plurality of load buffers to store the data access information during load instruction execution from the microprocessor;
- generating trace control information based on the received data access information;
- receiving read data information after load instruction execution in the microprocessor and second identification information identifying one of the plurality of load buffers used for load instruction execution from the microprocessor;
- and
- associating the trace control information with the read data information according to the first identification information and the second identification information.
Dependencies are inferred from the claim text.