Voltage indicator signal generation system and method
AssigneeInternational Business Machines Corporation
InventorsParag Birmiwal, Bernard Drerup
Life of this patent
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Abstract
The present invention provides for a system comprising a peripheral component interface (PCI) host bridge. The PCI host bridge is configured to be coupled to a PCI bus, and to receive a system reset signal, to generate a PCI bus reset signal based on the received system reset signal, to detect a PCI operational mode of the PCI bus, and to generate a voltage indicator signal based on the detected PCI operational mode. A voltage regulator is coupled to the PCI host bridge and configured to receive the voltage indicator signal and to regulate a signaling voltage for the PCI bus based on the voltage indicator signal.
Claims19
A system, comprising:
- a peripheral component interface (PCI) host bridge configured to be coupled to a PCI bus, and to receive a system reset signal, to generate a PCI bus reset signal based on the received system reset signal, to detect a PCI operational mode of the PCI bus, and to generate a voltage indicator signal based on the detected PCI operational mode;
- and
- a voltage regulator coupled to the PCI host bridge and configured to receive the voltage indicator signal and to regulate a signaling voltage for the PCI bus based on the voltage indicator signal.
A method, comprising:
- receiving a system reset signal;
- generating a PCI bus reset signal based on the received system reset signal;
- determining a PCI operational mode of a PCI bus;
- and
- generating a voltage indicator signal based on the determined PCI operational mode.
A system, comprising:
- a five-level voltage comparator configured to identify voltages of a PCIXCAP pin bus, and to generate a voltage indicator signal based on the identified voltages;
- a first multiplexer coupled to the five-level voltage comparator and configured to generate a first multiplexer output based on the voltage indicator signal and an output of a first flip-flop, based on a first multiplexer select signal;
- the first flip-flop coupled to the first multiplexer and configured to generate a first flip-flop output based on the first multiplexer output and a clock signal;
- a second multiplexer coupled to the first flip-flop and configured to generate a second multiplexer output based on the first flip-flop output and an output of a second flip-flop, based on a second multiplexer select signal;
- a counter coupled to the second multiplexer and configured to generate the second multiplexer select signal based on the clock signal;
- and
- the second flip-flop coupled to the second multiplexer and configured to generate a second flip-flop output based on the second multiplexer output and the clock signal.
A computer program product, the computer program product having a medium with a computer program embodied thereon, the computer program comprising:
- computer code for receiving a system reset signal;
- computer code for generating a PCI bus reset signal based on the received system reset signal;
- computer code for determining a PCI operational mode of a PCI bus;
- and
- computer code for generating a voltage indicator signal based on the determined PCI operational mode.
Dependencies are inferred from the claim text.