Semiconductor integrated circuit manufacturing method and semiconductor integrated circuit manufacturing apparatus

Abstract

A semiconductor integrated circuit manufacturing method and semiconductor integrated circuit manufacturing apparatus are provided that implement automatic placement that reflects constraints provided regarding parasitic elements and inter-element variation provided in a real-valued range. A netlist is prepared in advance, a permissible range setting process sets a permissible range relating to elements, a floor plan process creates a floor plan that satisfies the set permissible range using the netlist, an automatic placement process places elements using the created floor plan and extracts routing constraints that realize a permissible range for parasitic elements, and a routing process performs routing in accordance with the extracted routing constraints.

Dependencies are inferred from the claim text.