Time-based weighted round robin arbiter
AssigneeTexas Instruments Incorporated
InventorsSumit Das, Kevin Main
Life of this patent
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Abstract
A PCI bus time-based weighted round robin arbiter has a phase table divided into a plurality of phases. Each of the phases is assigned to one of the ports on the PCI bus. An arbiter state machine is coupled to the phase table and looks at the port assignment for the next plurality of phases, for example, 3 phases. If the arbiter determines that the next plurality of phases is assigned to a single port, that port is selected as the next bus master.
Claims20
A PCI bus time-based weighted round robin arbiter comprising:
- a phase table comprising a plurality of phases, each of the phases being assigned to a port on a PCI bus;
- an arbiter state machine coupled to the phase table for looking at a plurality of phases at a time, the arbiter state machine selecting the next bus master to use the PCI bus when a predetermined number of phases have been assigned to a single port.
In a PCI bus arbiter, arbiter means for guaranteeing a predetermined time for transmitting isochronous data comprising:
- means for dividing a time cycle into a predetermined number of phases, each of the phases being assigned to a port on a PCI bus;
- an arbiter state machine responsive to the means for dividing for granting the use of the PCI bus to a selected port.
A method of operating a PCI bus comprising:
- providing a time-bases arbiter for assigning each device on the bus a predetermined time also in which to perform bus transactions;
- terminating a bus transaction for one device on the bus in order to guarantee isochrony of data being transferred for another one of the devices on the bus.
Dependencies are inferred from the claim text.