Clock generator and data recovery circuit using the same
AssigneeRealtek Semiconductor Corp.
InventorChao-Hsin Lu
Life of this patent
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AssigneeRealtek Semiconductor Corp.
InventorChao-Hsin Lu
Estimating the term…
A clock generator and a data recovery circuit. The clock generator includes a voltage control oscillator (VCO) for generating a sampling clock and multi-phase clocks, a multiplexer for receiving the multi-phase clocks and selecting one of the multi-phase clocks to generate a selected clock according to a selection signal, a phase-frequency detector for receiving the selected clock and a reference clock and generating a phase-frequency error signal, a charge pump and loop filter for receiving the phase-frequency error signal and generating a control voltage, a phase detector for receiving the sampling clock and an input signal and generating a phase error signal, and a digital low-pass filter for receiving the phase error signal and generating the selection signal. The digital low-pass filter clears an accumulated phase error when it generates the selection signal to force the multiplexer to change the phase.
A data recovery circuit, comprising:
A clock generator for generating a sampling clock according to an input signal and a reference clock, the clock generator comprising:
A data recovery circuit, comprising:
Dependencies are inferred from the claim text.