Apparatus and method for direct quadrature power amplifier modulation
AssigneeSamsung Electronics Co., Ltd.
InventorMichael Brobston
Life of this patent
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Abstract
A direct power amplifier modulator that accepts bipolar I and Q data, either baseband or multi-carrier digital IF, and generates the resultant magnitude and sign components. Also described is a direct power amplifier modulator that generates quadrature terms of the carrier frequency offset by 90°, wherein each term is shifted by 180° under control of the respective sign components of the quadrature I and Q samples. The present invention also provides a transistor structure configured to accept differential quadrature frequency components that are combined in a post PA outphasing combiner.
Claims20
An RF transmitter comprising:
- a quadrature source data block capable of receiving an input in-phase (I) data stream and an input quadrature (Q) data stream and generating therefrom an in-phase absolute value (|I|′) data signal and a quadrature absolute value (|Q|′) data signal;
- and
- a quadrature modulation block comprising a first totem pole transistor structure containing a first bias modulator controlled by said |I|′ data signal and a second totem pole transistor structure containing a second bias modulator controlled by said |Q|′ data signal.
A base station for use in a wireless network, comprising:
- a processor and an accessible memory;
- a transceiver connected to be controlled by the processor, the transceiver including a quadrature source data block capable of receiving an input in-phase (I) data stream and an input quadrature (Q) data stream and generating therefrom an in-phase absolute value (|I|′) data signal and a quadrature absolute value (|Q|′) data signal, and a quadrature modulation block comprising a first totem pole transistor structure containing a first bias modulator controlled by said |I|′ data signal and a second totem pole transistor structure containing a second bias modulator controlled by said |Q|′ data signal.
A mobile station for use in a wireless network, comprising:
- a processor and an accessible memory;
- a transceiver connected to be controlled by the processor, the transceiver including a quadrature source data block capable of receiving an input in-phase (I) data stream and an input quadrature (Q) data stream and generating therefrom an in-phase absolute value (|I|′) data signal and a quadrature absolute value (|Q|′) data signal, and a quadrature modulation block comprising a first totem pole transistor structure containing a first bias modulator controlled by said |I|′ data signal and a second totem pole transistor structure containing a second bias modulator controlled by said |Q|′ data signal.
Dependencies are inferred from the claim text.