Inverse tracking over two different clock domains
AssigneeCirrus Logic, Inc.
InventorsDaniel Gudmundson, John Melanson, Rahul Singh, Ahsan Chowdhury
Life of this patent
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Abstract
A video decoder in which the video source clock is generated entirely in the digital domain is disclosed herein. By creating a virtual version of the source clock in a numeric oscillator, the amount of noise in the system is substantially reduced. Furthermore, by transferring the digitized video signal, sampled with an asynchronous crystal clock, into the source clock domain, the accuracy of the brightness (amplitude) and color (phase) information can be greatly enhanced.
Claims16
A method of processing an analog signal having an intrinsic source clock, the method comprising:
- sampling the analog signal according to a sample clock asynchronous with the intrinsic source clock so as to produce a sequence of digital samples forming a digital representation of the analog signal;
- storing the digital samples in a transfer buffer at a rate corresponding to the sample clock;
- retrieving the digital samples from the transfer buffer at a rate corresponding to the intrinsic source clock;
- and
- filtering the digital samples to correct at least one of an amplitude error and a phase error caused by jitter in the sample clock.
A source clock recovery circuit comprising:
- a phase detector configured to receive at a first input a plurality of digital samples corresponding to an analog signal having an intrinsic source clock and configured to receive at a second input a digitally generated clock signal;
- and
- a digital phase lock loop and numeric oscillator configured to create the digitally generated clock signal and to lock the frequency and phase of the digitally generated clock signal to the intrinsic source clock.
A video decoder comprising:
- an input circuit configured to receive a composite video signal and digitally sample the composite video signal using a sample clock asynchronous with an intrinsic source clock of the composite video signal;
- a transfer buffer configured to receive samples of the composite video signal at a rate corresponding to the sample clock;
- a clock recovery circuit configured to receive the samples of the composite video signal, recover the intrinsic source clock from the samples, and provide the recovered intrinsic source clock to the video decoder;
- and
- a filter for correcting at least one of an amplitude error and a phase error in the samples caused by jitter in the sample clock, wherein the filter receives as an input the recovered intrinsic source clock from the clock recovery circuit.
Dependencies are inferred from the claim text.