Scan line conversion circuit for simultaneously carrying out three-dimensional motion adaptive sequential scan conversion and scan line conversion

Abstract

A scan line conversion circuit is provided for simultaneously carrying out three-dimensional motion adaptive sequential scan conversion and scan line conversion. The scan line conversion circuit comprises an FIFO memory into which the video signal is input; a sequential scan conversion circuit section for converting an interlace signal sent from the FIFO memory to a non-interlace signal; an address generator into which a vertical enlargement ratio and a synchronous signal are input to generate an address as a spatial position after scan line conversion; a memory control unit for generating a memory control signal based on the address sent from the address generator; a coefficient generator for generating a coefficient for performing scan line conversion; a plurality of first multipliers for multiplying sequentially scan converted signals, sent from the sequential scan conversion circuit section, by respective coefficients; and an adder for adding signals output from the multipliers together.

Dependencies are inferred from the claim text.