Mode-selecting apparatus, display apparatus including the same, and method of selecting a mode in display unit

A mode-selecting apparatus for selecting one of a first mode in which images are displayed on a display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:

• a first unit which counts a number of input horizontal synchronization control signals, and resets said number of input horizontal synchronization control signals;
• a second unit which counts a number of input data-enable signals, and resets said number of input data-enable signals;
• and
• a third unit which selects one of said first and second modes in accordance with both said number of input horizontal synchronization control signals and said number of input data-enable signals.

A mode-selecting apparatus for selecting one of a first mode in which images are displayed on a display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:

• a first unit which (a) counts a number of input horizontal synchronization control signals, (b) resets said number of input horizontal synchronization control signals at each of a timing at which a n-VALID signal having a frame period and produced in accordance with said data-enable signal rises up, and a timing at which said vertical synchronization control signal rises up, (c) produces a HC-RC signal designed to be in a high level at a first timing at which said number of input horizontal synchronization control signals is equal to M wherein M indicates a predetermined positive integer, and (d) resets said HC-RC signal into a low level at an earlier timing among a timing at which said n-VALID signal falls down, and a timing at which said vertical synchronization control signal falls down;
• a second unit which (a) counts a number of input data-enable signals, (b) resets said number of input data-enable signals at each of a timing at which a signal having a frame period and produced in accordance with said data-enable signal rises up, and a timing at which said vertical synchronization control signal rises up, (c) produces a DC-RC signal designed to be in a high level at a second timing at which said number of input data-enable signals is equal to N wherein N indicates a predetermined positive integer smaller than said M, and (d) resets said DC-RC signal into a low level at an earlier timing among a timing at which said n-VALID signal falls down, and a timing at which said vertical synchronization control signal falls down;
• a third unit which selects one of said first and second modes;
• and
• a fourth unit which produces a logical-sum signal designed to be in a high level at a timing at which at least one of said HC-RC signal and said DC-RC signal is in a high level,
• said third unit selecting said first mode if said number of input data-enable signals is equal to zero (0) at a timing at which said logical-sum signal was produced, and selecting said second mode if said number of input data-enable signals is not equal to zero (0) at said timing.

A display apparatus including:

• a display unit;
• and
• a mode-selecting apparatus for selecting one of a first mode in which images are displayed on said display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:
• a first unit which counts a number of input horizontal synchronization control signals in each of frame periods;
• a second unit which counts a number of input data-enable signals in each of frame periods;
• and
• a third unit which selects one of said first and second modes in accordance with both said number of input horizontal synchronization control signals and said number of input data-enable signals.

A display apparatus including:

• a display unit;
• and
• a mode-selecting apparatus for selecting one of a first mode in which images are displayed on a display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:
• a first unit which counts a number of input horizontal synchronization control signals, and resets said number of input horizontal synchronization control signals;
• a second unit which counts a number of input data-enable signals, and resets said number of input data-enable signals;
• and
• a third unit which selects one of said first and second modes in accordance with both said number of input horizontal synchronization control signals and said number of input data-enable signals.

A display apparatus including:

• a display unit;
• and
• a mode-selecting apparatus for selecting one of a first mode in which images are displayed on said display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:
• a first unit which (a) counts a number of input horizontal synchronization control signals, (b) resets said number of input horizontal synchronization control signals at each of a timing at which a n-VALID signal having a frame period and produced in accordance with said data-enable signal rises up, and a timing at which said vertical synchronization control signal rises up, (c) produces a HC-RC signal designed to be in a high level at a first timing at which said number of input horizontal synchronization control signals is equal to M wherein M indicates a predetermined positive integer, and (d) resets said HC-RC signal into a low level at an earlier timing among a timing at which said n-VALID signal falls down, and a timing at which said vertical synchronization control signal falls down;
• a second unit which (a) counts a number of input data-enable signals, (b) resets said number of input data-enable signals at each of a timing at which a signal having a frame period and produced in accordance with said data-enable signal rises up, and a timing at which said vertical synchronization control signal rises up, (c) produces a DC-RC signal designed to be in a high level at a second timing at which said number of input data-enable signals is equal to N wherein N indicates a predetermined positive integer smaller than said M, and (d) resets said DC-RC signal into a low level at an earlier timing among a timing at which said n-VALID signal falls down, and a timing at which said vertical synchronization control signal falls down;
• a third unit which selects one of said first and second modes;
• and
• a fourth unit which produces a logical-sum signal designed to be in a high level at a timing at which at least one of said HC-RC signal and said DC-RC signal is in a high level,
• said third unit selecting said first mode if said number of input data-enable signals is equal to zero (0) at a timing at which said logical-sum signal was produced, and selecting said second mode if said number of input data-enable signals is not equal to zero (0) at said timing.

A method of selecting one of a first mode in which images are displayed on a display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:

• counting a number of input horizontal synchronization control signals in each of frame periods;
• counting a number of input data-enable signals in each of frame periods;
• and
• selecting one of said first and second modes in accordance with both said number of input horizontal synchronization control signals and said number of input data-enable signals.

A method of selecting one of a first mode in which images are displayed on a display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:

• counting a number of input horizontal synchronization control signals;
• counting a number of input data-enable signals;
• resetting said number of input horizontal synchronization control signals;
• resetting said number of input data-enable signals;
• and
• selecting one of said first and second modes in accordance with both said number of input horizontal synchronization control signals and said number of input data-enable signals.

A method of selecting one of a first mode in which images are displayed on a display unit in accordance with a vertical synchronization control signal and a horizontal synchronization control signal, and a second mode in which images are displayed on said display unit in accordance with a data-enable signal, including:

• counting a number of input horizontal synchronization control signals;
• counting a number of input data-enable signals;
• resetting said number of input horizontal synchronization control signals at each of a timing at which a n-VALID signal having a frame period and produced in accordance with said data-enable signal rises up, and a timing at which said vertical synchronization control signal rises up;
• resetting said number of input data-enable signals at each of a timing at which a signal having a frame period and produced in accordance with said data-enable signal rises up, and a timing at which said vertical synchronization control signal rises up;
• producing a HC-RC signal designed to be in a high level at a first timing at which said number of input horizontal synchronization control signals is equal to M wherein M indicates a predetermined positive integer;
• producing a DC-RC signal designed to be in a high level at a second timing at which said number of input data-enable signals is equal to N wherein N indicates a predetermined positive integer smaller than said M;
• producing a logical-sum signal designed to be in a high level at a timing at which at least one of said HC-RC signal and said DC-RC signal is in a high level;
• resetting said HC-RC signal into a low level at an earlier timing among a timing at which said n-VALID signal falls down, and a timing at which said vertical synchronization control signal falls down;
• resetting said DC-RC signal into a low level at an earlier timing among a timing at which said n-VALID signal falls down, and a timing at which said vertical synchronization control signal falls down;
• and
• selecting said first mode if said number of input data-enable signals is equal to zero (0) at a timing at which said logical-sum signal was produced, and selecting said second mode if said number of input data-enable signals is not equal to zero (0) at said timing.