Solid-state image sensor
AssigneeSanyo Electric Co., Ltd.
InventorsMasahiro Oda, Shinichiro Izawa
Life of this patent
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Abstract
A solid-state image sensor capable of suppressing increase of a dark current and a power consumption, and suppressing reduction of a transfer efficiency of electrons is provided. The solid-state image sensor comprises a charge storage region including a first conductive type first impurity region that has a first depth from a main surface of a semiconductor substrate, a first conductive type second impurity region that has a second depth larger than the first depth and an impurity concentration lower than an impurity concentration of the first impurity region, and a first conductive type third impurity region that has a third depth larger than the first depth and smaller than the second depth.
Claims14
A solid-state image sensor comprising:
- a semiconductor substrate;
- and
- a charge storage region including a first conductive type first impurity region that has a first depth from a main surface of said semiconductor substrate, a first conductive type second impurity region that has a second depth larger than the first depth of said first impurity region and an impurity concentration lower than an impurity concentration of said first impurity region, and a first conductive type third impurity region that has a third depth larger than the first depth of said first impurity region of said semiconductor substrate and smaller than the second depth of said second impurity region.
A solid-state image sensor comprising:
- an n-type semiconductor substrate;
- a charge storage region including an n-type first impurity region that has a first depth from a main surface of said n-type semiconductor substrate, an n-type second impurity region that has a second depth larger than the first depth of said n-type first impurity region and an impurity concentration lower than an impurity concentration of said n-type first impurity region, and an n-type third impurity region that has a third depth larger than the first depth of said n-type first impurity region and smaller than the second depth of said n-type second impurity region;
- and
- a p-type fourth impurity region formed in the main surface of said n-type semiconductor substrate so as to have a fourth depth from the main surface of said n-type semiconductor substrate larger than the second depth of the second impurity region of said charge storage region.
Dependencies are inferred from the claim text.