Low basal plane dislocation bulk grown SiC wafers
AssigneeCree, Inc.
InventorsAdrian Powell, Mark Brady, Valeri Tsvetkov
Life of this patent
Estimating the term…
Abstract
A high quality single crystal wafer of SiC is disclosed. The wafer has a diameter of at least about 3 inches (75 mm) and at least one continuous square inch (6.25 cm2) of surface area that has a basal plane dislocation volume density of less than about 500 cm−2 for a 4 degree off-axis wafer.
Claims25
A high quality single crystal wafer of SiC having a diameter of at least about 3 inches and at least one continuous square inch of surface area that has a basal plane dislocation density less than about 500 cm−2.
A method of forming a wafer of a high quality single crystal of SiC, the method comprising:
- forming a SiC boule having a diameter slightly larger than 3 inches, and
- slicing the boule between about 2 and 12 degrees degrees off the 0001 plane into wafers having at least one continuous square inch of surface area that has a basal plane dislocation density of less than about 500 cm−2 on each wafer.
In a method of producing a high quality bulk single crystal of silicon carbide in a seeded sublimation system, the improvement comprising:
- growing a SiC boule having a diameter of at least about 3 inches and at least one continuous square inch of surface area that has a basal plane dislocation density of less than about 500 cm−2.
- slicing the SiC boule into wafers, wherein each wafer has at least one continuous square inch of surface area that has a basal plane dislocation density of less than about 500 cm−2.
A high quality semiconductor precursor wafer comprising:
- a silicon carbide wafer having a diameter of at least about 3 inches;
- said wafer having the 4H polytype;
- and
- said wafer having at least one continuous square inch of surface area that has a basal plane dislocation density on its surface of between about 50 and about 500 cm−2.
A high quality semiconductor precursor wafer comprising:
- a silicon carbide wafer having a diameter of at least about 3 inches;
- and
- said wafer having at least one continuous square inch of surface area having between about 2,000 and 20,000 basal plane dislocations.
A high quality semiconductor precursor wafer comprising:
- a silicon carbide wafer having a diameter of at least about 3 inches;
- said wafer having at least one continuous square inch of surface area having a basal plane dislocation density of less than about 500 cm−2;
- and
- a Group III-nitride epitaxial layer on said surface of said silicon carbide wafer.
A plurality of semiconductor device precursors comprising:
- a silicon carbide wafer having a diameter of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density of less than about 500 cm−2;
- and
- a plurality of respective Group III-nitride epitaxial layers on some portions of said wafer.
A semiconductor wafer comprising:
- a bulk single crystal silicon carbide substrate of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density of less than about 500 cm−2, said bulk single crystal having respective first and second surfaces opposite one another;
- and
- a plurality of devices on said silicon carbide substrate, each said device comprising:
- an epitaxial layer located on the substrate, said layer having a concentration of suitable dopant atoms for making the epitaxial layer a first conductivity type, and respective source, channel, and drain portions;
- a metal oxide layer on said channel portion;
- and
- and a metal gate contact on said metal oxide layer for forming an active channel when a bias is applied to said metal gate contact.
A semiconductor wafer comprising:
- a bulk single crystal silicon carbide substrate of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density of less than 500 cm−2, said bulk single crystal having respective first and second surfaces opposite one another;
- and
- a plurality of devices on said silicon carbide substrate, each said device comprising:
- a conductive channel on said substrate;
- a source and a drain on said conductive channel;
- and
- a metal gate contact between said source and said drain on said conductive channel for forming an active channel when a bias is applied to the metal gate contact.
A semiconductor wafer comprising:
- a bulk single crystal silicon carbide substrate of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density less than 500 cm−2, said bulk single crystal having respective first and second surfaces opposite one another.
Dependencies are inferred from the claim text.