Flash device security method utilizing a check register
AssigneeMicron Technology, Inc.
InventorRobert Gentile
Life of this patent
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Abstract
A security method for preventing accidental or unauthorized writes to a flash memory. According to one embodiment of the present invention, a BIOS program stored in a flash memory array generates a random access code when executed by a processor. A check register stores the random access code and enables write operations to the flash memory array based upon an externally provided access code. In another embodiment, the BIOS program directs the processor to write the random access code to the check register to enable write operations in response to an external write request.
Claims23
A flash memory device comprising:
- a memory array that is adapted to contain a set of instructions for generating a command to an external device to initiate the creation of an access code;
- and
- a check register to store the access code from the external device, wherein the check register generates a write enable signal to the memory array in response to the access code.
A flash memory system comprising:
- a flash memory array having a BIOS program stored therein, wherein the BIOS program contains a program to initiate an access code generation by a processor;
- and
- a check register to store the random access code, wherein the check register generates a write enable signal to the flash memory array based upon an request code from the processor.
A flash memory system comprising:
- a memory array having a BIOS program stored therein;
- control circuitry to control write operations to the memory array;
- a processor to execute the BIOS program;
- and
- a programmed logic device having a code register to store a random access code generated by the processor in response to instructions contained in the BIOS program, wherein the programmed logic device gates a write enable signal to the control circuitry in response to a comparison of the stored random access code and a request code from the processor.
A method for operating a flash memory device having a check register and a memory array, the method comprising:
- instructing an external device to generate a first access code at power up;
- receiving the access code for storage in the check register;
- and
- toggling write enable signal to the memory array in response to a comparison of a second access code contained in a received write command and the first access code.
A method for operating a memory system having a memory device and a processor, the method comprising:
- the memory device directing the processor to generate an enable code;
- the processor issuing a write command to the memory device, the write command comprising a request code;
- and
- comparing the request code to the enable code and generating or disabling a write enable signal to the memory device in response to the comparison.
Dependencies are inferred from the claim text.