I2C bus controlling method
AssigneeMitsubishi Denki Kabushi Kaisha
InventorsShohei Moriwaki, Osamu Chiba
Life of this patent
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Abstract
A module has an IC for communication control (a PHY unit) and an EEPROM (or MCU) connected to the PHY unit via an I2C bus. When a software reset is triggered while the PHY unit reads non-volatile register (NVR) data from the EEPROM (or MCU) via the I2C bus, the module causes an I2C interface circuit of the PHY unit to forcedly toggle and send a clock signal to the EEPROM (or MCU) via the I2C bus to make the EEPROM (or MCU) recognize that interrupted communications via the I2C bus are pseudo completed.
Claims2
A method of controlling an I2C bus which connects an IC for communication control to either an EEPROM or an MCU, said method comprising:
- causing an I2C interface circuit of said IC for communication control to output a serial clock signal and to read initial setting data from said EEPROM or MCU via said I2C bus in response to a hardware RESET signal from a host;
- causing the host to output a RESET command to said IC for communication control to software-reset said IC for communication control, thereby stopping the output of the serial clock signal from said I2C interface circuit;
- and
- causing said I2C interface circuit of said IC for communication control to forcedly output a serial clock signal to make said EEPROM or MCU recognize that interrupted I2C communications are pseudo completed and free said I2C bus.
A method of controlling an I2C bus which connects an IC for communication control to an MCU, said method comprising:
- causing an I2C interface circuit of said IC for communication control to output a serial clock signal and to read initial setting data from said MCU via said I2C bus in response to a hardware RESET signal from a host;
- causing the host to output a RESET command to said IC for communication control to software-reset said IC for communication control, thereby stopping the output of the serial clock signal from said I2C interface circuit;
- and
- causing said IC for communication control to output a RESET signal which is synchronized with the software reset to said MCU to reset said MCU and cause said MCU to free said I2C bus.
Dependencies are inferred from the claim text.