Integration scheme to improve NMOS with poly cap while mitigating PMOS degradation

A method of fabricating a semiconductor device comprising:

• forming p-type well regions and n-type well regions within a semiconductor body defining NMOS and PMOS regions, respectively;
• forming isolation regions to define active areas and electrically isolate active areas from each other;
• forming a gate oxide layer on the active areas defined by the isolation regions;
• depositing a conductive gate layer and patterning to form gate electrodes;
• growing a poly ox layer over the device;
• forming offset spacers on lateral edges of the gate electrodes;
• forming extension regions by implanting an n-type dopant into the active areas of the NMOS region and a p-type dopant into the active areas of the PMOS region;
• forming a nitride containing cap oxide layer over the device;
• forming sidewall spacers on the lateral edges of the gate electrodes;
• forming source/drain regions within the NMOS region by selectively implanting an n-type dopant and forming source/drain regions within the PMOS region by selectively implanting a p-type dopant;
• forming a strain inducing poly cap layer over the device, wherein the strain inducing poly cap layer includes a hydrogen composition;
• and
• performing a thermal process that causes tensile strain to be induced into channel regions of the NMOS region and causes dopants to diffuse according to the hydrogen composition of the strain inducing poly cap layer and the nitride composition of the nitride containing cap oxide layer.

A method of fabricating a semiconductor device comprising:

• selecting a desired dopant profile for PMOS devices within a PMOS region, wherein the desired dopant profile includes a relatively large lateral abruptness;
• selecting a hydrogen content for a strain inducing poly cap layer;
• selecting a nitride content for a nitride containing cap oxide layer;
• selecting a PMOS dose amount that compensates for diffusion of implanted dopants as a function of the hydrogen content, the nitride content, and the desired dopant profile;
• forming the nitride containing cap oxide layer over PMOS and NMOS regions of the semiconductor device according to the selected nitride content;
• implanting p-type dopants into source/drain regions of PMOS devices within the PMOS region according to the selected PMOS dose amount;
• and
• forming the strain inducing poly cap layer over the PMOS and NMOS regions according to the selected hydrogen content.