Method and apparatus for extraction and insertion of plesiochronous overhead data
AssigneeAlcatel-Lucent USA Inc.
InventorsBernd Bleisteiner, Bertram Nuetzel, Miguel Robledo, Wolfgang Rupprecht, Martin Saeger
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Abstract
The invention comprises a method and apparatus for adapting plesiochronous hierarchical layered data to produce synchronous hierarchical layered data. Similarly, the invention comprises a method and apparatus for adapting synchronous hierarchical layered data to produce plesiochronous hierarchical layered data.
Claims29
A method of adapting plesiochronous hierarchical layered data to produce synchronous hierarchical layered data, comprising:
- buffering plesiochronous data comprising a plurality of hierarchical layers;
- and
- applying at least one clock signal to said plurality of hierarchical layers of said buffered plesiochronous data for producing said synchronous hierarchical layered data.
An apparatus for adapting plesiochronous hierarchical layered data to produce synchronous hierarchical layered data, comprising:
- a memory component operable to buffer plesiochronous data, said plesiochronous data having a plurality of hierarchical layers;
- and
- a processor coupled to said memory component for applying at least one clock signal to said plurality of hierarchical layers, said at least one clock signal operable to read said plesiochronous data from said memory component as substantially synchronous hierarchical layered data.
A method of adapting synchronous hierarchical layered data to produce plesiochronous hierarchical layered data, comprising:
- buffering synchronous data comprising a plurality of hierarchical layers;
- and
- applying at least one clock signal to said plurality of hierarchical layers of said buffered synchronous data for producing said plesiochronous hierarchical layered data.
An apparatus for adapting synchronous hierarchical layered data to produce plesiochronous hierarchical layered data, comprising:
- a memory component operable to buffer synchronous data, said synchronous data having a plurality of hierarchical layers;
- and
- a processor coupled to said memory component for applying at least one clock signal to said plurality of hierarchical layers, said at least one clock signal operable to read said synchronous data from said memory component as plesiochronous hierarchical layered data.
Dependencies are inferred from the claim text.