Dynamic multi-Vcc scheme for SRAM cell stability control

A method, comprising:

• identifying a memory cell to be accessed, the memory cell being part of a matrix of memory cells, the matrix having a first number of rows and a second number of columns;
• activating a wordline associated with the identified memory cell, the wordline also being associated with a second memory cell;
• supplying a first voltage to the identified memory cell, the first voltage also being supplied to other memory cells in the same column as the identified memory cell;
• and
• simultaneously supplying a second voltage to the second memory cell, the second voltage also being supplied to other memory cells in the same column as the second memory cell.

A cell arranged in a memory array, the memory array comprising rows and columns of cells, the cell being in a column, the cell comprising:

• first and second access transistors each having gate terminals coupled to a wordline, the first access transistor being coupled to a bitline and the second access transistor being coupled to a complementary bitline;
• first and second pull-down transistors each having source terminals coupled to ground;
• first and second pull-up transistors each having source terminals coupled to a two-to-one multiplexer, wherein a first pull-up transistor drain is coupled to a first pull-down transistor drain and to a second pull-down transistor gate and a second pull-up transistor drain is coupled to a second pull-down transistor drain and to a first pull-down transistor gate;
• wherein the two-to-one multiplexer supplies a first voltage to the column when a write to the cell occurs and supplies a second voltage to the column when a read of the cell occurs.

A memory array, comprising:

• a plurality of cells arranged in rows and columns, wherein each cell in a row is coupled to a dedicated wordline and each cell in a column is coupled to a dedicated bitline pair;
• a first multiplexer for selectively supplying one of two supply voltages to a first column, the first column including a selected cell;
• a second multiplexer for selectively supplying one of the two supply voltages to a second column, the second column including a non-selected cell, wherein the selected cell and the non-selected cell share a wordline;
• wherein the first multiplexer supplies the first voltage to the first column of cells when an operation is being performed to the selected cell while the second multiplexer simultaneously supplies the second voltage to the second column of cells.