Storage device and semiconductor device

A storage device comprising:

• a source line arranged along a row direction;
• a bit line arranged along a column direction;
• a storage element arranged at an intersection of the source line and the bit line, and having a characteristic that the application of an electric signal not lower than a first threshold signal allows the storage element to shift from a high resistance value state to a low resistance value state and that the application of an electric signal not lower than a second threshold signal, which has a polarity different from the first threshold signal, allows the storage element to shift from a low resistance value state to a high resistance value state;
• a writing circuit connected to one terminal of the bit line and applying a predetermined voltage to the bit line;
• and
• a voltage adjusting circuit connected to a storage element that is located closest to another terminal of the bit line;
• wherein the voltage adjusting circuit compares the voltage applied to said storage element located closest to said another terminal of the bit line with a setting voltage to thereby adjust the voltage that said writing circuit applies to the bit line.

A semiconductor device having a storage device, said storage device comprising:

• a source line arranged along a row direction;
• a bit line arranged along a column direction;
• a storage element arranged at an intersection of the source line and the bit line, and having a characteristic that the application of an electric signal not lower than a first threshold signal allows the storage element to shift from a high resistance value state to a low resistance value state and that the application of an electric signal not lower than a second threshold signal, which has a polarity different from the first threshold signal, allows the storage element to shift from a low resistance value state to a high resistance value state;
• a writing circuit connected to one terminal of the bit line and applying a predetermined voltage to the bit line;
• and
• a voltage adjusting circuit connected to a storage element that is located closest to another terminal of the bit line;
• wherein the voltage adjusting circuit compares the voltage applied to said storage element located closest to said another terminal of the bit line with a setting voltage to thereby adjust the voltage that said writing circuit applies to the bit line.