Complementary output resistive memory cell
AssigneeSharp Laboratories of America, Inc.
InventorSheng Hsu
Life of this patent
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Abstract
A complementary resistive memory structure is provided comprising a common source electrode and a first electrode separated from the common source electrode by resistive memory material; and a second electrode adjacent to the first electrode and separated from the common source electrode by resistive memory material, along with accompanying circuitry and methods of programming and reading the complementary resistive memory structure.
Claims18
A memory structure comprising:
- a first memory resistor connected between a first source voltage and a first active transistor at a first active transistor source;
- a first load transistor connected between a drain voltage and the first active transistor at a first active transistor drain;
- and a first output connected at the first active drain;
- a second memory resistor connected between a second source voltage and a second active transistor at a second active transistor source;
- a second load transistor connected between the drain voltage and the second active transistor at a second active transistor drain;
- and a second output connected at the second active drain;
- and
- a word line connected to a first gate of the first active transistor and to a second gate of the second active transistor.
A complementary resistive memory structure comprising:
- a first memory resistor connected between a common source voltage and a first active transistor at a first active transistor source;
- a first load transistor connected between a drain voltage and the first active transistor at a first active transistor drain;
- and a first output connected at the first active drain;
- a second memory resistor connected between the common source voltage and a second active transistor at a second active transistor source;
- a second load transistor connected between the drain voltage and the second active transistor at a second active transistor drain;
- and a second output connected at the second active drain;
- and
- a word line connected to a first gate of the first active transistor and to a second gate of the second active transistor.
A complementary resistive memory structure comprising:
- a common source electrode;
- a first electrode separated from the common source electrode by a resistive memory material;
- and
- a second electrode adjacent to the first electrode and separated from the common source electrode by the resistive memory material.
A method of programming a complimentary resistive memory structure having a common electrode separated from a first electrode and a second electrode by a resistive memory material comprising:
- grounding the first electrode;
- allowing the common electrode to float;
- and
- applying a programming pulse to the second electrode.
Dependencies are inferred from the claim text.