US 2006/0067100 A1Published application

Semiconductor storage device

AssigneeKabushiki Kaisha Toshiba

InventorsRyu Ogiwara, Daisaburo Takashima

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Abstract

A semiconductor storage device comprises first and second memory cells, each connected to the first pair of word line and bit line and a second pair of word line and bit line, a sense amplifier connected between the first and second bit lines, a first capacitor whose storage electrode being connected to the first bit line, a second capacitor whose storage electrode being connected to the second bit line, first and second wires respectively connected to the first and second plate electrodes of the first and second capacitors, wherein the first and second bit lines are in a complementary relation, and when “0” is read to the first bit line, the first capacitor has an operation to increase a potential of the first plate electrode through the first wire before the sense amplifier operates.

Claims19

Dependent claims

A semiconductor storage device comprising:

a first word line and a second word line extending in a first direction;
a first bit line and a second bit line extending in a second direction intersecting with the first direction;
a first memory cell connected to the first word line and the first bit line;
a second memory cell connected to the second word line and the second bit line;
a sense amplifier connected between the first bit line and the second bit line;
a first capacitor having a first storage electrode and a first plate electrode, the first storage electrode being connected to the first bit line;
a second capacitor having a second storage electrode and a second plate electrode, the second storage electrode being connected to the second bit line;
a first wire connected to the first plate electrode of the first capacitor;
and
a second wire connected to the second plate electrode of the second capacitor,
wherein the first bit line and the second bit line are in a complementary relation, and when “0” is read to the first bit line, the first capacitor has an operation to increase a potential of the first plate electrode through the first wire before the sense amplifier operates.

8 more elements

A semiconductor storage device comprising:

a first word line and a second word line extending in a first direction;
a first bit line and a second bit line extending in a second direction intersecting with the first direction;
a first memory cell connected to the first word line and the first bit line;
a second memory cell connected to the second word line and the second bit line;
a sense amplifier connected between the first bit line and the second bit line;
a first MOS transistor having a first conductive path and a first gate electrode, one end of the first conductive path being connected to the first bit line;
a second MOS transistor having a second conductive path and a second gate electrode, one end of the second conductive path being connected to the second bit line;
a first dummy word line connected to the first gate electrode;
a second dummy word line connected to the second gate electrode;
a first capacitor having a first storage electrode and a first plate electrode, the first storage electrode being connected to the other end of the first conductive path;
a second capacitor having a second storage electrode and a second plate electrode, the second storage electrode being connected to the other end of the second conductive path;
a first pre-charger connected to the first storage electrode of the first capacitor;
a second pre-charger connected to the second storage electrode of the second capacitor;
a first dummy plate line connected to the first plate electrode of the first capacitor;
and
a second dummy plate line connected to the second plate electrode of the second capacitor,
wherein the first bit line and the second bit line are in a complementary relationship, and when “0” is read to the first bit line, a charge previously given to the first pre-charger is injected to the first bit line before the sense amplifier operates.

14 more elements

Dependencies are inferred from the claim text.