Amplification gain stages having replica stages for DC bias control
AssigneeIntel Corporation
InventorsSiva Narendra, Vivek De
Life of this patent
Estimating the term…
Abstract
An amplification apparatus is provided that includes a plurality of gain stages including a first gain stage having first and second transistors and a second gain stage having third and fourth transistors. A plurality of replica stages may also be provided that includes a first replica stage and a second replica stage. Each replica stage may correspond/match one of the plurality of gain stages. An amplifying device may be provided to adjust a body potential of at least the first transistor of the first gain based on an output of the first replica stage and an output of the second replica stage.
Claims27
A amplification apparatus comprising:
- a plurality of gain stages including a first gain stage having first and second transistors and a second gain stage having third and fourth transistors;
- a plurality of replica stages including a first replica stage and a second replica stage, each replica stage corresponding with one of the plurality of gain stages;
- and
- an amplifying device to adjust a body potential of at least the first transistor of the first gain stage.
An apparatus comprising:
- a first gain stage having first and second transistors;
- a first replica stage having a first transistor to substantially match the first transistor of the first gain stage and a second transistor to substantially match the second transistor of the first gain stage, the first replica stage to provide a first output signal;
- a second gain stage having third and fourth transistors;
- a second replica stage having a third transistor to substantially match the third transistor of the second gain stage and a fourth transistor to substantially match the fourth transistor of the second gain stage, the second replica stage to provide a second output signal;
- and
- a biasing device to adjust a DC bias applied to the second gain stage based on the first output signal provided by the first replica stage and the second output signal provided by the second replica stage.
A system comprising:
- a receiving device to receive data;
- a memory device to store the received data;
- and
- a processing device to process the data, the receiving device including:
- a first gain stage having first and second transistors;
- a second gain stage having third and fourth transistors;
- a first replica stage and a second replica stage, each corresponding with one of the plurality of gain stages;
- and
- an amplifying device to adjust a DC bias condition based on output signals of the first replica stage and the second replica stage.
Dependencies are inferred from the claim text.