Back to results
US 2006/0066348 A1Published application
Semiconductor integrated circuit device
AssigneeSeiko Instruments Inc.
InventorMasanori Miyagi
Life of this patent
Estimating the term…
Abstract
In an integrated circuit having two circuits operating at different power supply voltages a level shifter, which transmits a signal from a high voltage operation circuit to a low voltage operation circuit, is composed of a depletion NMOS transistor with its gate electrode fixed to the potential of the power supply voltage of the low voltage operation circuit.
Claims3
A semiconductor integrated circuit device, comprising:
- a first circuit that operates with a first power supply;
- a second circuit that operates with a second power supply having a voltage lower than a voltage of the first power supply;
- and
- a depletion NMOS transistor having a drain connected with an output terminal of the first circuit, a source connected with an input terminal of the second circuit, and a gate connected with the second power supply, and transmitting a signal from the output terminal of the first circuit to the input terminal of the second circuit.
1 more element
A semiconductor integrated circuit device, comprising:
- a first circuit that operates with a first power supply and includes a gate oxide film having a first thickness;
- a second circuit that operates with a second power supply having a voltage lower than a voltage of the first power supply and includes a gate oxide film having a second thickness which is thinner than the gate oxide film having the first thickness;
- and
- a depletion NMOS transistor having a drain connected with an output terminal of the first circuit, a source connected with an input terminal of the second circuit, a gate connected with the second power supply, and a gate oxide film having a thickness equal to the thickness of the first-circuit, and transmitting a signal from the output terminal of the first circuit to the input terminal of the second circuit.
1 more element
A semiconductor integrated circuit device, comprising:
- an electrically rewritable non-volatile memory element which operates with a first power supply and includes a gate oxide film having a first thickness;
- a second circuit portion which operates with a second power supply having a voltage lower than a voltage of the first power supply and includes a gate oxide film having a second thickness which is thinner than the first thickness of the gate oxide film;
- and
- a depletion NMOS transistor which has a drain connected with an output terminal of the electrically rewritable non-volatile memory element, a source connected with an input terminal of the second circuit, a gate connected with the second power supply, and a gate oxide film having a thickness equal to the thickness of the electrically rewritable non-volatile memory element, and which transmits a signal from the output terminal of the electrically rewritable non-volatile memory element to the input terminal of the second circuit.
1 more element
Dependencies are inferred from the claim text.