Slave device having independent error recovery
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsNorman Chou, Whitney Li
Life of this patent
Estimating the term…
Abstract
A slave device adapted to couple to a master processor and including an error handler and a communication controller. The error handler is configured to detect errors internal to the slave device and, in response to detecting at least one error and independent of the master processor, configured to select an error recovery operation based on the at least one detected error and to initiate and perform the selected error recovery operation. The communication controller is configured to communicate with the master processor according to a master/slave protocol, and configured to maintain the master/slave protocol during performance of the selected error recovery operation by the error handler.
Claims24
A slave device adapted to couple to a master processor, the slave device comprising:
- an error handler configured to detect errors internal to the slave device and, in response to detecting at least one error and independent of the master processor, configured to select an error recovery operation based on the at least one detected error and configured to initiate and perform the selected error recovery operation;
- and
- a communication controller configured to communicate with the master processor according to a master/slave protocol, and configured to maintain the master/slave protocol during performance of the selected error recovery operation by the error handler.
A packet routing device comprising:
- an error handler configured to detect errors internal to the packet routing device and, in response to detecting at least one error and independent of the master processor, configured to select an error recovery operation based on the at least one detected error, and configured to initiate and perform the selected error recovery operation;
- and
- a communication controller adapted to couple to a master processor and to a network fabric, the communication controller configured to transfer data packets between the master processor and the network fabric according to a communication protocol, and configured to maintain the communication protocol during performance of the selected error recovery operation by the error handler.
A memory device comprising:
- an error handler configured to detect errors internal to the memory device and, in response to detecting at least one error and independent of the master processor, configured to select an error recovery operation based on the at least one detected error, and configured to initiate and perform the selected error recovery operation;
- a storage medium configured to store data;
- and
- a memory controller adapted to couple to a master processor, the memory controller configured to perform data transactions between the master processor and the storage medium according to a communication protocol and configured to maintain the communication protocol during performance of the selected error recovery operation by the error handler.
A network system comprising:
- a master processor;
- and
- a slave device coupled to the master processor, the slave device comprising:
- an error handler configured to detect errors internal to the slave device and, in response to detecting at least one error and independent of the master processor, configured to select an error recovery operation based on the at least one detect error and configured to initiate and perform the selected error recovery operation;
- and
- a communication controller configured to communicate with the master processor according to a master/slave protocol, and configured to maintain the master/slave protocol during performance of the selected error recovery operation by the error handler.
A method of operating a slave device adapted to couple to a master processor, the method comprising:
- communicating with the master processor according to a master/slave protocol;
- detecting at least one error internal to the slave device;
- selecting an error recovery operation based on the at least one detected internal error;
- initiating and performing the selected error recovery operation independent of the master processor;
- and
- maintaining the master/slave protocol with the master processor during performance of the selected error recovery operation.
Dependencies are inferred from the claim text.