System and method for checking validity of data transmission

#1. Field of the Invention

#The present invention relates to systems and methods for checking the validity of electronic data transmission, and particularly to a system and method for checking the validity of data transmission through a network according to a checksum mechanism.

#2. Prior art of the invention

#FIG. 1 is a block diagram of hardware infrastructure of a system for checking the validity of data transmission in accordance with the preferred embodiment of the present invention;

#FIG. 2 is a schematic diagram of data structures of original data, any one data unit, any one data byte, a data packet, and a corresponding data packet having errors;

#FIG. 3 is a schematic diagram of performing a left shift operation to obtain a one-byte sized check-code in a data transmitting computer of the system of FIG. 1;

#FIG. 1 is a block diagram of hardware infrastructure of a system for checking the validity of data transmission (hereinafter, “the system”) in accordance with the preferred embodiment of the present invention. The system comprises a data transmitting computer 1, a data receiving computer 2, and a network 3. The data transmitting computer 1 is connected to the data receiving computer 2 via the network 3. The data transmitting computer 1 comprises a Central Processing Unit (CPU) 11, a Peripheral Component Interface (PCI) bus 12, and a memory 13. The CPU 11 is connected to the memory 13 via the PCI bus 12. The memory 13 stores original data which need to be sent to the data receiving computer 2. The original data comprise N data units (symbolically depicted as data unit0, data unit1, data unit2, . . . , and data unit(N-1) in FIG. 2). Each data unit contains 2m bytes (symbolically depicted as byte0, byte1, . . . , and byte(2m-1)), wherein “m” represents the number “0” or any natural number. Each byte comprises 8 bits symbolically depicted as b0, b1, b2, . . . , and b7. Each bit comprises a binary number “0” or “1.” The network 3 is an electronic communications network that supports a transmission control protocol or an Internet protocol (TCP/IP). The network 3 may be an intranet, the Internet, or any other suitable type of communications network. The CPU 11 comprises a shift operation unit 111, an addition operation unit 112, a complement operation unit 113, and a control unit 114. The shift operation unit 111 performs a shift operation on the data units of the original data. The shift operation may be either a left shift operation or a right shift operation. The addition operation unit 112 adds data in all data units after the shift operation to obtain a checksum1. The complement operation unit 113 calculates a 2's complement of the last 2m bytes of the checksum1 to obtain a check-code. The control unit 114 reads the original data from the memory 13 via the PCI bus 12, and sends a data packet to the data receiving computer 2. The data packet comprises the original data and the check-code.

#The check-code contains 2m bytes, wherein “m” represents the number “0” or any natural number. That is, the check-code may be 1 byte, 2 bytes, 4 bytes, etc. In such case, the shift operation unit 111 shifts all the data units with a cycle of “2m” bytes, namely 8*2m bits. The shift operation may be either a left shift operation or a right shift operation. The left shift operation on the data unit(N-1) can be expressed as “2mByte(N-1)<<Mod (N−1, 8*2m),” in which the operator “<<” represents the left shift operation, and “Mod” is the abbreviation of “modulus.” Mod (N−1, 8*2m) represents a remainder produced by N−1 being divided by 8*2m, and means a digit by which the data unit(N-1) is left shifted. In comparison, the right shift operation on the data unit(N-1) can be expressed as “2m Byte(N-1)>>Mod(N−1, 8*2m),” in which the operator “>>” represents the right shift operation.

#The data receiving computer 2 receives and checks the data packet from the data transmitting computer 1, in order to determine whether the data packet is valid. The data receiving computer 2 comprises a CPU 21. The CPU 21 comprises a shift operation unit 211, an addition operation unit 212, and a control unit 213. The shift operation unit 211 performs a shift operation on unpacked data units of the original data of the received data packet. The shift operation may be either a left shift operation or a right shift operation. The addition operation unit 212 adds the data units after the shift operation to obtain a checksum2, and further adds the last 2m bytes of the checksum2 to the check-code from the data packet to obtain a checksum3. The control unit 213 determines whether the data packet from the data transmitting computer 1 is valid by checking whether the last 2m bytes of the checksum3 equal “0.” If the last 2m bytes of the checksum3 equal “0,” the data receiving computer 2 accepts the data packet. In contrast, if the last 2m bytes of the checksum3 do not equal “0,” the data receiving computer 2 considers the data packet as being invalid, and sends a request for resending of the data packet to the data transmitting computer 1.